A fully polynomial time approximation scheme for timing driven minimum cost buffer insertion

Proceedings - Design Automation Conference

Volumn , Issue , 2009, Pages 424-429

  Hu, Shiyan ^a   Li, Zhuo ^b   Alpert, Charles J ^b  

^a Michigan Technological University   (United States)

^b IBM AUSTIN RESEARCH LABORATORY   (United States)

Author keywords

Buffer insertion; Cost minimization; Dynamic programming; Fully polynomial time approximation scheme; NP complete

Indexed keywords

BUFFER CIRCUITS; COMPUTER AIDED DESIGN; DELAY CIRCUITS; DYNAMICS; INTEGRATED CIRCUIT INTERCONNECTS; NANOTECHNOLOGY; OPTIMAL SYSTEMS; POLYNOMIAL APPROXIMATION; TIMING CIRCUITS; TREES (MATHEMATICS);

BUFFER INSERTION; COST MINIMIZATION; DYNAMIC PROGRAMMING ALGORITHM; FULLY POLYNOMIAL TIME APPROXIMATION SCHEMES; INTERCONNECT OPTIMIZATION; NP COMPLETE; PERFORMANCE GUARANTEES; THEORETICAL GUARANTEES;

DYNAMIC PROGRAMMING;

EID: 70350712438     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1629911.1630026     Document Type: Conference Paper

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