RUMBLE: An incremental, timing-driven, physical-synthesis optimization algorithm

Proceedings of the International Symposium on Physical Design

Volumn , Issue , 2008, Pages 2-9

  Papa, David A ^a,c   Luo, Tao ^b   Moffitt, Michael D ^c   Sze, C N ^c   Li, Zhuo ^c   Nam, Gi Joon ^c   Alpert, Charles J ^c   Markov, Igor L ^a  

^a The Department of Civil and Environmental Engineering   (United States)

^b UNIVERSITY OF TEXAS AT AUSTIN   (United States)

^c IBM AUSTIN RESEARCH LABORATORY   (United States)

Author keywords

Static timing analysis; Timing driven placement

Indexed keywords

STATIC TIMING ANALYSIS; SYNTHESIS OPTIMIZATION; TIMING DRIVEN PLACEMENT;

ALGORITHMS; GATES (TRANSISTOR); OPTIMIZATION; STATIC ANALYSIS;

MICROPROCESSOR CHIPS;

EID: 43349101482     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1353629.1353633     Document Type: Conference Paper

References (15)