An O(bn 2) time algorithm for optimal buffer insertion with b buffer types

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 25, Issue 3, 2006, Pages 484-489

  Li, Zhuo ^a,b   Shi, Weiping ^a,b  

^a IEEE   (United States)

^b TEXAS A AND M UNIVERSITY   (United States)

Author keywords

Buffer insertion; Data structure; Elmore delay; Interconnect; Routing

Indexed keywords

BUFFER INSERTION; ELMORE DELAY; INTERCONNECTS; ROUTING;

BUFFER STORAGE; DATA STRUCTURES; PERFORMANCE; ROUTERS;

ALGORITHMS;

EID: 33244457847     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2005.854631     Document Type: Article

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