CMOS compatible self-aligned S/D regions for implant-free InGaAs MOSFETs

Solid-State Electronics

Volumn 74, Issue , 2012, Pages 71-76

  Czornomaz, L ^a   El Kazzi, M ^a   Hopstaken, M ^b   Caimi, D ^a   MacHler P ^a   Rossel, C ^a   Bjoerk, M ^a   Marchiori, C ^a   Siegwart, H ^a   Fompeyrine, J ^a  

^a IBM RESEARCH ZURICH   (Switzerland)

^b IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

MOSFET; Ni InGaAs; Self aligned; SIMS; XPS

Indexed keywords

CMOS COMPATIBLE; DEVICE PERFORMANCE; IN-SITU; INDIUM GALLIUM ARSENIDE; INTEGRATION ISSUES; METAL CONTACTS; METAL-ORGANIC VAPOR PHASE EPITAXY; METAL-OXIDE; MOS-FET; MOSFETS; NI-INGAAS; NMOSFETS; PROCESS CONDITION; SELF-ALIGNED; SEMICONDUCTOR FIELD-EFFECT TRANSISTORS; SOURCE/DRAIN REGIONS;

EPITAXIAL GROWTH; METALLORGANIC VAPOR PHASE EPITAXY; MOSFET DEVICES; PHOTOELECTRONS; SECONDARY ION MASS SPECTROMETRY; SILICIDES; X RAY PHOTOELECTRON SPECTROSCOPY;

SEMICONDUCTING INDIUM;

EID: 84861885154     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2012.04.014     Document Type: Conference Paper

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