Dynamically heterogeneous cores through 3D resource pooling

Proceedings - International Symposium on High-Performance Computer Architecture

Volumn , Issue , 2012, Pages 323-334

  Homayoun, Houman ^a   Kontorinis, Vasileios ^a   Shayan, Amirali ^a   Lin, Ta Wei ^a   Tullsen, Dean M ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

3D STACKING TECHNOLOGY; CODE RUNNING; EXTRA DIMENSIONS; FINE GRANULARITY; HETEROGENEOUS CORES; HETEROGENEOUS PROCESSORS; LOW LEVEL; PERFORMANCE GAIN; RESOURCE POOLING; RUNTIMES;

COMPUTER ARCHITECTURE; ENERGY EFFICIENCY; SUPERCOMPUTERS; THREE DIMENSIONAL;

CORE LEVELS;

EID: 84860326635     PISSN: 15300897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPCA.2012.6169037     Document Type: Conference Paper

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