Wafer-level heterogeneous integration of GaN HEMTs and Si (100) MOSFETs

IEEE Electron Device Letters

Volumn 33, Issue 2, 2012, Pages 200-202

  Lee, Hyung Seok ^a   Ryu, Kevin ^b   Sun, Min ^a   Palacios, Tomas ^a  

^a Department of Electrical Engineering and Computer Science   (United States)

^b MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

GaN; high electron mobility transistor (HEMT); integration circuit; metal oxide semiconductor field effect transistor (MOSFET); silicon; wafer bonding

Indexed keywords

ALGAN/GAN; DIGITAL ELECTRONICS; EXCELLENT PERFORMANCE; GAN; GAN HEMTS; HETEROGENEOUS INTEGRATION; HIGH QUALITY; HIGH TEMPERATURE STABILITY; HIGH-ELECTRON-MOBILITY TRANSISTOR (HEMT); HYBRID POWER AMPLIFIERS; INTEGRATION CIRCUIT; METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR; MIXED-SIGNAL CIRCUITS; MOSFETS; NITRIDE SURFACE; P-MOSFETS; SI (1 1 1); SI DEVICES; SI(1 0 0); SILICON (100); THIN LAYERS; TRANSFER METHOD; WAFER LEVEL;

DIGITAL CIRCUITS; DIGITAL DEVICES; ELECTRIC SIGNAL SYSTEMS; FABRICATION; GALLIUM NITRIDE; HIGH ELECTRON MOBILITY TRANSISTORS; INTEGRATED CIRCUITS; MOSFET DEVICES; POWER AMPLIFIERS; SEMICONDUCTING ALUMINUM COMPOUNDS; SEMICONDUCTING SILICON COMPOUNDS; SILICON; SILICON ON INSULATOR TECHNOLOGY; SILICON OXIDES; TRANSISTORS; WAFER BONDING;

SILICON WAFERS;

EID: 84856272141     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2011.2174136     Document Type: Article

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