Concepts, architectures, and run-time systems for efficient and adaptive reconfigurable processors

Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2011

Volumn , Issue , 2011, Pages 80-87

  Bauer, Lars ^a   Shafique, Muhammad ^a   Henkel, Jörg ^a  

^a KARLSRUHE INSTITUTE OF TECHNOLOGY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE PROCESSING; ADAPTIVITY; ARCHITECTURAL DESIGN DECISIONS; BASIC CONCEPTS; BIT-WIDTH; DESIGN DECISIONS; GENERAL APPROACH; MEMORY INTERFACE; RE-CONFIGURABLE; RECONFIGURABLE FABRICS; RECONFIGURABLE PROCESSORS; RUNTIME SYSTEMS;

ARCHITECTURAL DESIGN; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; RECONFIGURABLE HARDWARE;

ADAPTIVE CONTROL SYSTEMS;

EID: 80052128997     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/AHS.2011.5963920     Document Type: Conference Paper

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