Warp processors

ACM Transactions on Design Automation of Electronic Systems

Volumn 11, Issue 3, 2006, Pages 659-681

  Lysecky, Roman ^a,c   Stitt, Greg ^b,d   Vahid, Frank ^b,d  

^a UNIVERSITY OF ARIZONA   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c University of Arizona   (United States)

^d University of California Riverside   (United States)

Author keywords

Configurable logic; Dynamic optimization; FPGA; Hardware software codesign; Hardware software partitioning; Just in time (JIT) compilation; Warp processors

Indexed keywords

EID: 33748420512     PISSN: 10844309     EISSN: 10844309     Source Type: Journal    
DOI: 10.1145/1142980.1142986     Document Type: Article

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