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Volumn , Issue , 1999, Pages 145-154
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Memory interfacing and instruction specification for reconfigurable processors
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Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER ARCHITECTURE;
DATA STORAGE EQUIPMENT;
FIR FILTERS;
INTERFACES (COMPUTER);
MICROPROCESSOR CHIPS;
RECONFIGURABLE PROCESSORS;
FIELD PROGRAMMABLE GATE ARRAYS;
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EID: 0032627649
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/296399.296446 Document Type: Article |
Times cited : (48)
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References (23)
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