Run-time instruction set selection in a transmutable embedded processor

Proceedings - Design Automation Conference

Volumn , Issue , 2008, Pages 56-61

  Bauer, Lars ^a   Shafique, Muhammad ^a   Henkel, Jörg ^a  

^a UNIVERSITY OF KARLSRUHE   (Germany)

Author keywords

ASIP; Extensible embedded processors; Reconfigurable computing; Run time adaptation; Special instruction

Indexed keywords

ARSENIC COMPOUNDS; COMPUTER AIDED DESIGN; DIGITAL INTEGRATED CIRCUITS; INDUSTRIAL ENGINEERING; MOTION ESTIMATION;

ASIP; EXTENSIBLE EMBEDDED PROCESSORS; RECONFIGURABLE COMPUTING; RUN-TIME ADAPTATION; SPECIAL INSTRUCTION;

APPLICATIONS;

EID: 51549087415     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DAC.2008.4555781     Document Type: Conference Paper

References (26)

1. Xtensa processor, Tensilica Inc. (http://www.tensilica.com)
2. ARCtangent processor. ARC Intl. (http://www.arc.com)
3. CoWare Inc, LISATek (http://www.coware.com)
4. Target Compiler (http://www.retarget.com)
5. ASIP Meister (http://asip-solutions.com)
6. Stretch processor (http://www.stretchinc.com)
7. CoSy compiler, ACE bv (http://www.ace.nl/compiler/cosy.html)
8. J. Henkel "Closing the SoC Design Gap", IEEE Computer Volume 36, Issue 9, September 2003, pp. 119-121
9. N. Clark, H. Zhong, S. Mahlke "Processor Acceleration Through Automated Instruction Set Customization", MICRO-36 2003, pp. 129-140
10. K. Atasu, L. Pozzi, P. Ienne "Automatic Application-Specific Instruction-Set Extensions Under Microarchitectural Constraints", DAC 2003, pp. 256-261
11. F. Sun, A. Raghunathan, S. Ravi, N. K. Jha "A scalable application specific processor synthesis methodology", ICCAD 2003, pp. 283-290
12. N. Cheung, J. Henkel, S. Parameswaran "Rapid Configuration & Instruction Selection for an ASIP: A Case Study", DATE 2003, pp. 802-807
13. K. Compton, S. Hauck "Reconfigurable computing: a survey of systems and software", ACM Computing Surveys 2002, pp. 171-210
14. F. Barat, R. Lauwereins "Reconfigurable Instruction Set Processors: A Survey", RSP 2000, pp. 168-173
15. S. Vassiliadis, D. Soudris, "Fine- and Coarse-Grain Reconfigurable Computing", Springer 2007
16. F. Bouwens, M. Berekovic, A. Kanstein, G. Gaydadjiev "Architectural Exploration of the ADRES Coarse-Grained Reconfigurable Array", ARC 2007, pp. 1-13
17. S. Vassiliadis et al. "The MOLEN polymorphic processor", IEEE Transaction on Computers, Issue 11, 2004, pp. 1363-1375
18. R. Lysecky, G. Stitt, F. Vahid "Warp Processors", ACM Transaction on Design Automation of Electronic Systems Vol. 11, 2006, pp. 659-681
19. M. Dales "Managing a Reconfigurable Processor in a General Purpose Workstation Environment", DATE 2003, pp. 980-985
20. E. Lübbers, M. Platzner "ReconOS: An RTOS supporting Hard- and Software Threads", FPL 2007, pp. 441-446
21. L. Bauer, M. Shafique, S. Kramer, J. Henkel "RISPP: Rotating Instruction Set Processing Platform", DAC 2007, pp. 791-796
22. L. Bauer, M. Shafique, J. Henkel "Efficient Resource Utilization for an Extensible Processor through Dynamic Instruction Set Adaptation", WASP 2007, pp. 39-46
23. L. Bauer, M. Shafique, S. Kreutz, J. Henkel "Run-time System for an Extensible Embedded Processor with Dynamic Instruction Set", DATE 2008, pp. 752-757
24. M. R. Garey, D. S. Johnson "Computers and Intractability - A guide to NP-completeness", W. H. Freeman, San Francisco 1979
25. S. Martello, P. Toth "Knapsack problems", Wiley 1990
26. J. Hromkovic "Algorithmics for hard problems", Springer 2003