메뉴 건너뛰기




Volumn , Issue , 2011, Pages 85-95

Page placement in hybrid memory systems

Author keywords

hybrid memory; memory controller; phase change memory

Indexed keywords

ACCESS PATTERNS; ENERGY-DELAY; HYBRID DESIGN; HYBRID MEMORIES; MAIN MEMORY; MEMORY ADDRESS; MEMORY CONTROLLER; MEMORY SYSTEMS; NANOSECOND RANGE; PAGE PLACEMENTS; PHASE CHANGES; PHASE-CHANGE MEMORY TECHNOLOGIES;

EID: 79959583242     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1995896.1995911     Document Type: Conference Paper
Times cited : (366)

References (39)
  • 4
    • 70450245578 scopus 로고    scopus 로고
    • Thread Criticality Predictors for Dynamic Performance, Power, and Resource Management in Chip Multiprocessors
    • A. Bhattacharjee and M. Martonosi. Thread Criticality Predictors for Dynamic Performance, Power, and Resource Management in Chip Multiprocessors. In ISCA, 2009.
    • (2009) ISCA
    • Bhattacharjee, A.1    Martonosi, M.2
  • 5
    • 33846535493 scopus 로고    scopus 로고
    • The M5 Simulator: Modeling Networked Systems
    • N. Binkert et al. The M5 Simulator: Modeling Networked Systems. IEEE Micro, 26(4), 2006.
    • (2006) IEEE Micro , vol.26 , Issue.4
    • Binkert, N.1
  • 7
    • 78650839010 scopus 로고    scopus 로고
    • Understanding the Impact of Emerging Non-Volatile Memories on High-Performance, IO-Intensive Computing
    • A. Caulfield et al. Understanding the Impact of Emerging Non-Volatile Memories on High-Performance, IO-Intensive Computing. In SC, 2010.
    • (2010) SC
    • Caulfield, A.1
  • 8
    • 76749099329 scopus 로고    scopus 로고
    • Flip-N-Write: A Simple Deterministic Technique to Improve PRAM Write Performance, Energy and Endurance
    • S. Cho and H. Lee. Flip-N-Write: A Simple Deterministic Technique to Improve PRAM Write Performance, Energy and Endurance. In MICRO, 2009.
    • (2009) MICRO
    • Cho, S.1    Lee, H.2
  • 9
    • 72249087142 scopus 로고    scopus 로고
    • Better I/O Through Byte-Addressable, Persistent Memory
    • J. Condit et al. Better I/O Through Byte-Addressable, Persistent Memory. In SOSP, 2009.
    • (2009) SOSP
    • Condit, J.1
  • 10
    • 35348903171 scopus 로고    scopus 로고
    • Limiting the Power Consumption of Main Memory
    • B. Diniz et al. Limiting the Power Consumption of Main Memory. In ISCA, 2007.
    • (2007) ISCA
    • Diniz, B.1
  • 11
    • 74049097178 scopus 로고    scopus 로고
    • Leveraging 3D PCRAM Technologies to Reduce Checkpoint Overhead for Future Exascale Systems
    • X. Dong et al. Leveraging 3D PCRAM Technologies to Reduce Checkpoint Overhead for Future Exascale Systems. In SC, 2009.
    • (2009) SC
    • Dong, X.1
  • 12
    • 76349091566 scopus 로고    scopus 로고
    • PCRAMsim: System-Level Performance, Energy, and Area Modeling for Phase-Change RAM
    • X. Dong, N. Jouppi, and Y. Xie. PCRAMsim: System-Level Performance, Energy, and Area Modeling for Phase-Change RAM. In ICCAD, 2009.
    • (2009) ICCAD
    • Dong, X.1    Jouppi, N.2    Xie, Y.3
  • 13
    • 78650833009 scopus 로고    scopus 로고
    • Simple but Effective Heterogeneous Main Memory with On-Chip Memory Controller Support
    • X. Dong, Y. Xie, N. Muralimanohar, and N. P. Jouppi. Simple but Effective Heterogeneous Main Memory with On-Chip Memory Controller Support. In SC, 2010.
    • (2010) SC
    • Dong, X.1    Xie, Y.2    Muralimanohar, N.3    Jouppi, N.P.4
  • 14
    • 77954994037 scopus 로고    scopus 로고
    • Resistive Computation: Avoiding the Power Wall with Low-Leakage, STT-MRAM Based Computing
    • X. Guo, E. Ipek, and T. Soyata. Resistive Computation: Avoiding the Power Wall with Low-Leakage, STT-MRAM Based Computing. In ISCA, 2010.
    • (2010) ISCA
    • Guo, X.1    Ipek, E.2    Soyata, T.3
  • 15
    • 28444477433 scopus 로고    scopus 로고
    • Improving Energy Efficiency by Making DRAM Less Randomly Accessed
    • H. Huang et al. Improving Energy Efficiency by Making DRAM Less Randomly Accessed. In ISLPED, 2005.
    • (2005) ISLPED
    • Huang, H.1
  • 16
    • 0346003039 scopus 로고    scopus 로고
    • Design and implementation of power-aware virtual memory
    • H. Huang, P. Pillai, and K. G. Shin. Design and implementation of power-aware virtual memory. In USENIX, 2003.
    • (2003) USENIX
    • Huang, H.1    Pillai, P.2    Shin, K.G.3
  • 17
    • 52649148744 scopus 로고    scopus 로고
    • Self-Optimizing Memory Controllers: A Reinforcement Learning Approach
    • E. Ipek et al. Self-Optimizing Memory Controllers: A Reinforcement Learning Approach. In ISCA, 2008.
    • (2008) ISCA
    • Ipek, E.1
  • 18
    • 77952268480 scopus 로고    scopus 로고
    • Dynamically Replicated Memory: Building Reliable Systems from Nanoscale Resistive Memories
    • E. Ipek et al. Dynamically Replicated Memory: Building Reliable Systems From Nanoscale Resistive Memories. In ASPLOS, 2010.
    • (2010) ASPLOS
    • Ipek, E.1
  • 19
    • 0034442261 scopus 로고    scopus 로고
    • Power Aware Page Allocation
    • A. Lebeck et al. Power Aware Page Allocation. In ASPLOS, 2000.
    • (2000) ASPLOS
    • Lebeck, A.1
  • 20
    • 70450235471 scopus 로고    scopus 로고
    • Architecting Phase Change Memory as a Scalable DRAM Architecture
    • B. Lee et al. Architecting Phase Change Memory as a Scalable DRAM Architecture. In ISCA, 2009.
    • (2009) ISCA
    • Lee, B.1
  • 21
    • 0346750534 scopus 로고    scopus 로고
    • Energy Management for Commercial Servers
    • December
    • C. Lefurgy et al. Energy Management for Commercial Servers. IEEE Computer, 36(12), December 2003.
    • (2003) IEEE Computer , vol.36 , Issue.12
    • Lefurgy, C.1
  • 22
  • 23
    • 85092664155 scopus 로고    scopus 로고
    • Operating System Support for NVM+DRAM Hybrid Main Memory
    • J. C. Mogul et al. Operating System Support for NVM+DRAM Hybrid Main Memory. In HotOS, 2009.
    • (2009) HotOS
    • Mogul, J.C.1
  • 24
    • 79959596459 scopus 로고    scopus 로고
    • Write Strategies for 2 and 4-bit Multi-Level Phase-Change Memory
    • T. Nirschl et al. Write Strategies for 2 and 4-bit Multi-Level Phase-Change Memory. In IEDM, 2007.
    • (2007) IEDM
    • Nirschl, T.1
  • 25
    • 33748852203 scopus 로고    scopus 로고
    • DMA-Aware Memory Energy Management
    • V. Pandey et al. DMA-Aware Memory Energy Management. In HPCA, 2006.
    • (2006) HPCA
    • Pandey, V.1
  • 26
    • 33646471906 scopus 로고    scopus 로고
    • Using Simpoint for Accurate and Efficient Simulation
    • E. Perelman et al. Using Simpoint for Accurate and Efficient Simulation. In SIGMETRICS, 2003.
    • (2003) SIGMETRICS
    • Perelman, E.1
  • 27
    • 76749167601 scopus 로고    scopus 로고
    • Enhancing Lifetime and Security of PCM-Based Main Memory with Start-Gap Wear Leveling
    • M. K. Qureshi et al. Enhancing Lifetime and Security of PCM-Based Main Memory with Start-Gap Wear Leveling. In MICRO, 2009.
    • (2009) MICRO
    • Qureshi, M.K.1
  • 28
    • 70450273507 scopus 로고    scopus 로고
    • Scalable High Performance Main Memory System Using Phase-Change Memory Technology
    • M. K. Qureshi, V. Srinivasan, and J. A. Rivers. Scalable High Performance Main Memory System Using Phase-Change Memory Technology. In ISCA, 2009.
    • (2009) ISCA
    • Qureshi, M.K.1    Srinivasan, V.2    Rivers, J.A.3
  • 30
    • 0033691565 scopus 로고    scopus 로고
    • Memory Access Scheduling
    • S. Rixner et al. Memory Access Scheduling. In ISCA, 2000.
    • (2000) ISCA
    • Rixner, S.1
  • 31
    • 77952283542 scopus 로고    scopus 로고
    • Micro-Pages: Increasing DRAM Efficiency with Locality-Aware Data Placement
    • K. Sudan et al. Micro-Pages: Increasing DRAM Efficiency with Locality-Aware Data Placement. In ASPLOS, 2010.
    • (2010) ASPLOS
    • Sudan, K.1
  • 32
    • 35348861182 scopus 로고    scopus 로고
    • DRAMsim: A Memory System Simulator
    • D. Wang et al. DRAMsim: A Memory System Simulator. SIGARCH Computer Architecture News, 33(4), 2005.
    • (2005) SIGARCH Computer Architecture News , vol.33 , Issue.4
    • Wang, D.1
  • 33
    • 84969366505 scopus 로고
    • eNVy: A Non-Volatile, Main Memory Storage System
    • M. Wu and W. Zwaenepoel. eNVy: a Non-Volatile, Main Memory Storage System. In ASPLOS, 1994.
    • (1994) ASPLOS
    • Wu, M.1    Zwaenepoel, W.2
  • 35
    • 34548825142 scopus 로고    scopus 로고
    • A Low Power Phase-Change Random Access Memory using a Data-Comparison Write Scheme
    • B.-D. Yang et al. A Low Power Phase-Change Random Access Memory using a Data-Comparison Write Scheme. In ISCAS, 2007.
    • (2007) ISCAS
    • Yang, B.-D.1
  • 37
    • 70449623993 scopus 로고    scopus 로고
    • Exploring Phase Change Memory and 3D Die-Stacking for Power/Thermal Friendly, Fast and Durable Memory Architectures
    • W. Zhang and T. Li. Exploring Phase Change Memory and 3D Die-Stacking for Power/Thermal Friendly, Fast and Durable Memory Architectures. In PACT, 2009.
    • (2009) PACT
    • Zhang, W.1    Li, T.2
  • 38
    • 70450277571 scopus 로고    scopus 로고
    • A Durable and Energy Efficient Main Memory Using Phase Change Memory Technology
    • P. Zhou et al. A Durable and Energy Efficient Main Memory Using Phase Change Memory Technology. In ISCA, 2009.
    • (2009) ISCA
    • Zhou, P.1
  • 39
    • 84893513203 scopus 로고    scopus 로고
    • The Multi-Queue Replacement Algorithm for Second-Level Buffer Caches
    • Y. Zhou, P. Chen, and K. Li. The Multi-Queue Replacement Algorithm for Second-Level Buffer Caches. In USENIX, 2001.
    • (2001) USENIX
    • Zhou, Y.1    Chen, P.2    Li, K.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.