Understanding the impact of emerging non-volatile memories on high-performance, IO-intensive computing

2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis, SC 2010

Volumn , Issue , 2010, Pages

  Caulfield, Adrian M ^a   Coburn, Joel ^a   Mollov, Todor I ^a   De, Arup ^a   Akel, Ameen ^a   He, Jiahua ^a,b   Jagatheesan, Arun ^b   Gupta, Rajesh K ^a   Snavely, Allan ^b   Swanson, Steven ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Flash memory; IO performance; Non volatile memory; Phase change memory; Spin torque transfer memory; Storage systems

Indexed keywords

DISK-BASED; EMERGING NON-VOLATILE MEMORIES; FILE SYSTEMS; INTENSIVE COMPUTING; IO PERFORMANCE; MAIN MEMORY; MEMORY FOOTPRINT; NON-VOLATILE MEMORIES; PERFORMANCE TRADE-OFF; RANDOM ACCESS; SCIENTIFIC APPLICATIONS; SOLID-STATE STORAGE; SPIN TORQUE; SPIN TRANSFER TORQUE; STORAGE SYSTEMS; STORAGE TECHNOLOGY; SYSTEM SOFTWARES;

FLASH MEMORY; PHASE CHANGE MEMORY;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 78650839010     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SC.2010.56     Document Type: Conference Paper

References (37)

1. Exascale computing study: Technology challenges in achieving exascale systems. Technical Report TR-2008-13, University of Notre Dame, CSE Department, September 2008.
2. R. Agrawal, A. Ailamaki, P. A. Bernstein, E. A. Brewer, M. J. Carey, S. Chaudhuri, A. Doan, D. Florescu, M. J. Franklin, H. Garcia- Molina, J. Gehrke, L. Gruenwald, L. M. Haas, A. Y. Halevy, J. M. Hellerstein, Y. E. Ioannidis, H. F. Korth, D. Kossmann, S. Madden, R. Magoulas, B. C. Ooi, T. O'Reilly, R. Ramakrishnan, S. Sarawagi, M. Stonebraker, A. S. Szalay, and G. Weikum. The claremont report on database research. Communications of the ACM, 52(6):56-65, 2009.
3. D. H. Bailey, E. Barszcz, J. T. Barton, D. S. Browning, R. L. Carter, L. Dagum, R. A. Fatoohi, P. O. Frederickson, T. A. Lasinski, R. S. Schreiber, H. D. Simon, and V. Venkatakrishnan. The nas parallel benchmarks, 1994.
4. F. Bedeschi, C. Resta, O. Khouri, E. Buda, L. Costa, M. Ferraro, F. Pellizzer, F. Ottogalli, A. Pirovano, M. Tosi, R. Bez, R. Gastaldi, and G. Casagrande. An 8mb demonstrator for high-density 1.8v phase-change memories. VLSI Circuits, 2004. Digest of Technical Papers. 2004 Symposium on, pages 442-445, June 2004.
5. Biological networks website. http://biologicalnetworks.net/.
6. Gotoblas2 website. http://www.tacc.utexas.edu/tacc-projects/.
7. M. J. Breitwisch. Phase change memory. Interconnect Technology Conference, 2008. IITC 2008. International, pages 219-221, June 2008.
8. F. Chen, D. A. Koufaty, and X. Zhang. Understanding intrinsic characteristics and system implications of flash memory based solid state drives. In SIGMETRICS'09: Proceedings of the eleventh international joint conference on Measurement and modeling of computer systems, pages 181-192, New York, NY, USA, 2009. ACM.
9. S. Cho and H. Lee. Flip-n-write: A simple deterministic technique to improve pram write performance, energy and endurance. In To appear in MICRO 2009, 2009.
10. J. Condit, E. B. Nightingale, E. Ipek, D. Burger, B. Lee, and D. Coetzee. Better i/o through byte-addressable, persistent memory. In SOSP'09: Proceedings of the twenty-second ACM Symposium on Operating systems principles. To appear.
11. G. Dhiman, R. Ayoub, and T. Rosing. Pdram: a hybrid pram and dram main memory system. In DAC'09: Proceedings of the 46th Annual Design Automation Conference, pages 664-469, New York, NY, USA, 2009. ACM.
12. B. Dieny, R. Sousa, G. Prenat, and U. Ebels. Spin-dependent phenomena and their implementation in spintronic devices. VLSI Technology, Systems and Applications, 2008. VLSI-TSA 2008. International Symposium on, pages 70-71, April 2008.
13. J. He, A. Jagatheesan, S. Gupta, J. Bennett, and A. Snavely. Dash: A recipe for a flash-based data intensive supercomputer. November 2010.
14. M. Hosomi, H. Yamagishi, T. Yamamoto, K. Bessho, Y. Higo, K. Yamane, H. Yamada, M. Shoji, H. Hachino, C. Fukumoto, H. Nagao, and H. Kano. A novel nonvolatile memory with spin torque transfer magnetization switching: spin-ram. Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International, pages 459-462, Dec. 2005.
15. International technology roadmap for semiconductors: Emerging research devices, 2009.
16. H. Jin, H. Jin, M. Frumkin, M. Frumkin, J. Yan, and J. Yan. The openmp implementation of nas parallel benchmarks and its performance. Technical report, NASA, 1999.
17. W. K. Josephson, L. A. Bongo, D. Flynn, and K. Li. Dfs: A file system for virtualized flash storage. In Proceedings of FAST 10: 8th USENIX Conference on File and Storage Technologies, 2010.
18. J. Katcher. Postmark filesystem performance benchmark. http://www.netapp.com/techlibrary/3022.html.
19. T. Kawahara, R. Takemura, K. Miura, J. Hayakawa, S. Ikeda, Y. Lee, R. Sasaki, Y. Goto, K. Ito, I. Meguro, F. Matsukura, H. Takahashi, H. Matsuoka, and H. Ohno. 2mb spin-transfer torque ram (spram) with bit-by-bit bidirectional current write and parallelizing-direction current read. Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. IEEE International, pages 480-617, Feb. 2007.
20. T. Kawahara, R. Takemura, K. Miura, J. Hayakawa, S. Ikeda, Y. M. Lee, R. Sasaki, Y. Goto, K. Ito, T. Meguro, F. Matsukura, H. Takahashi, H. Matsuoka, and H. Ohno. 2 mb spram (spintransfer torque ram) with bit-by-bit bi-directional current write and parallelizing-direction current read. Solid-State Circuits, IEEE Journal of, 43(1):109-120, Jan. 2008.
21. D.-S. Ko and S.-K. Cheong. Web performance enhancement of e-business system using the ssd. In FGCNS'08: Proceedings of the 2008 Second International Conference on Future Generation Communication and Networking Symposia, pages 81-84, Washington, DC, USA, 2008. IEEE Computer Society.
22. B. C. Lee, E. Ipek, O. Mutlu, and D. Burger. Architecting phase change memory as a scalable dram alternative. In ISCA'09: Proceedings of the 36th annual international symposium on Computer architecture, pages 2-13, New York, NY, USA, 2009. ACM.
23. S.-W. Lee, B. Moon, and C. Park. Advances in flash memory ssd technology for enterprise database applications. In SIGMOD'09: Proceedings of the 35th SIGMOD international conference on Management of data, pages 863-870, New York, NY, USA, 2009. ACM.
24. S.-W. Lee, B. Moon, C. Park, J.-M. Kim, and S.-W. Kim. A case for flash memory ssd in enterprise database applications. In SIGMOD'08: Proceedings of the 2008 ACM SIGMOD international conference on Management of data, pages 1075-1086, New York, NY, USA, 2008. ACM.
25. D. Narayanan, E. Thereska, A. Donnelly, S. Elnikety, and A. Rowstron. Migrating server storage to ssds: analysis of tradeoffs. In EuroSys'09: Proceedings of the 4th ACM European conference on Computer systems, pages 145-158, New York, NY, USA, 2009. ACM.
26. NASA. Nas parallel benchmarks, March 2010. http://www.nas.nasa.gov/ Resources/Software/npb.html.
27. Palomar transient factory (ptf) website. http://www.astro.caltech.edu/ ptf/.
28. S. Park and K. Shen. A performance evaluation of scientific i/o workloads on flash-based ssds. In Workshop on Interfaces and Architectures for Scientific Data Storage, 2009.
29. M. K. Qureshi, J. Karidis, M. Franceschini, V. Srinivasan, L. Lastras, and B. Abali. Enhancing lifetime and security of pcm-based main memory with start-gap wear leveling. In MICRO 42: Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture, pages 14-23, New York, NY, USA, 2009. ACM.
30. M. K. Qureshi, V. Srinivasan, and J. A. Rivers. Scalable high performance main memory system using phase-change memory technology. International Symposium on Computer Architecture, June 2009.
31. The ramp project. http://ramp.eecs.berkeley.edu/index.php?index.
32. K. Schmidt, Y. Ou, and T. Härder. The promise of solid state disks: increasing efficiency and reducing cost of dbms processing. In C3S2E'09: Proceedings of the 2nd Canadian Conference on Computer Science and Software Engineering, pages 35-41, New York, NY, USA, 2009. ACM.
33. A. S. Szalay, G. C. Bell, H. H. Huang, A. Terzis, and A. White. Lowpower amdahl-balanced blades for data intensive computing. SIGOPS Oper. Syst. Rev., 44(1):71-75, 2010.
34. R. Takemura, T. Kawahara, K. Miura, J. Hayakawa, S. Ikeda, Y. Lee, R. Sasaki, Y. Goto, K. Ito, T. Meguro, F. Matsukura, H. Takahashi, H. Matsuoka, and H. Ohno. 2mb spram design: Bi-directional current write and parallelizing-direction current read schemes based on spintransfer torque switching. Integrated Circuit Design and Technology, 2007. ICICDT'07. IEEE International Conference on, pages 1-4, 30 2007-June 1 2007.
35. H. Tanizaki, T. Tsuji, J. Otani, Y. Yamaguchi, Y. Murai, H. Furuta, S. Ueno, T. Oishi, M. Hayashikoshi, and H. Hidaka. A high-density and high-speed 1t-4mtj mram with voltage offset self-reference sensing scheme. Solid-State Circuits Conference, 2006. ASSCC 2006. IEEE Asian, pages 303-306, Nov. 2006.
36. Xdd version 6.5. http://www.ioperformance.com/.
37. P. Zhou, B. Zhao, J. Yang, and Y. Zhang. A durable and energy efficient main memory using phase change memory technology. In ISCA'09: Proceedings of the 36th annual international symposium on Computer architecture, pages 14-23, New York, NY, USA, 2009. ACM.