Leveraging 3D PCRAM technologies to reduce checkpoint overhead for future exascale systems

Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis, SC '09

Volumn , Issue , 2009, Pages

  Dong, Xiangyu ^a,b   Muralimanohar, Naveen ^a   Jouppi, Norm ^a   Kaufmann, Richard ^a   Xie, Yuan ^b  

^a HEWLETT PACKARD LABORATORIES   (United States)

^b PENNSYLVANIA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHECK POINTING; CHECKPOINTING SCHEMES; FAILURE RATE; HARD DISK DRIVES; MASSIVELY PARALLEL PROCESSING; NOVEL TECHNIQUES; PETASCALE; PHASE-CHANGE RANDOM ACCESS MEMORY; SMOOTH TRANSITIONS; SYSTEMS FAILURE;

FAILURE ANALYSIS; HARD DISK STORAGE; PARALLEL PROCESSING SYSTEMS; PHASE CHANGE MEMORY; QUALITY ASSURANCE; RANDOM ACCESS STORAGE; THREE DIMENSIONAL;

SECURITY OF DATA;

EID: 74049097178     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1654059.1654117     Document Type: Conference Paper

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