Insights into the design and optimization of tunnel-FET devices and circuits

IEEE Transactions on Electron Devices

Volumn 58, Issue 4, 2011, Pages 1045-1053

  Pal, Ashish ^a   Sachid, Angada B ^a   Gossner, Harald ^b   Rao, V Ramgopal ^a  

^a INDIAN INSTITUTE OF TECHNOLOGY BOMBAY   (India)

^b INFINEON TECHNOLOGIES AG   (Germany)

Author keywords

on current; output characteristics; power dissipation; propagation delay; rise and fall times; saturation voltage; tunnel field effect transistor (TFET)

Indexed keywords

ON-CURRENTS; OUTPUT CHARACTERISTICS; POWER DISSIPATION; PROPAGATION DELAY; RISE AND FALL TIMES; SATURATION VOLTAGE;

CAPACITANCE; DELAY CIRCUITS; DESIGN; DIGITAL DEVICES; DIGITAL INTEGRATED CIRCUITS; DRAIN CURRENT; ELECTRIC LOSSES; FIELD EFFECT TRANSISTORS; INTEGRATED CIRCUIT MANUFACTURE; OPTIMIZATION;

CURRENT VOLTAGE CHARACTERISTICS;

EID: 79953107368     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2011.2109002     Document Type: Article

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