Sub-20 nm gate length finFET design: Can high-κ spacers make a difference?

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2008, Pages

  Sachid, Angada B ^a   Francis, Roswald ^a   Baghini, Maryam Shojaei ^a   Sharma, Dinesh K ^a   Bach, Karl Heinz ^b   Mahnkopf, Reinhard ^b   Ramgopal Rao, V ^a  

^a INDIAN INSTITUTE OF TECHNOLOGY BOMBAY   (India)

^b INFINEON TECHNOLOGIES AG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

45 NM TECHNOLOGIES; FIN-THICKNESS; FINFETS; GATE LENGTHS; NOVEL DEVICES; ON CURRENTS; PROCESS VARIATIONS; SHORT-CHANNEL PERFORMANCE; SRAM CELLS;

ELECTRON DEVICES; MOSFET DEVICES;

FINS (HEAT EXCHANGE);

EID: 64549095483     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2008.4796790     Document Type: Conference Paper

References (8)

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7. J. Kedzierski et al, "Extension and source/drain design for high- performance FinFET devices", IEEE TED, Vol. 50, No 4, pp. 952-958, April 2003
8. Predictive Technology Models [Online: www. www.eas.asu.edu/~ptm] [9] S. Xiong, J. Bokor, "Sensitivity of double-gate and FinFET devices to process variations", IEEE TED, Vol. 50, pp. 2255-2261, 2003