Impacts of multiple-gated configuration on the characteristics of poly-si nanowire SONOS devices

IEEE Transactions on Electron Devices

Volumn 58, Issue 3, 2011, Pages 641-649

  Hsu, Hsing Hui ^a   Lin, Horng Chih ^a   Luo, Cheng Wei ^a   Su, Chun Jung ^a   Huang, Tiao Yuan ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

Field effect transistor (FET); multiple gate (MG); nanowire (NW); poly Si; silicon oxide nitride oxide silicon (SONOS)

Indexed keywords

GATE CONFIGURATION; GATE-ALL-AROUND; MEMORY WINDOW; MULTIPLE GATES; POLY-SI; SILICON-OXIDE-NITRIDE-OXIDE-SILICON (SONOS); SILICON-OXIDE-NITRIDE-OXIDE-SILICON DEVICES; SONOS DEVICES; TRANSFER CHARACTERISTICS;

EQUIPMENT; FIELD EFFECT TRANSISTORS; GALLIUM ALLOYS; MESFET DEVICES; NANOWIRES; NITRIDES; SILICON OXIDES;

SILICON;

EID: 79952041184     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2010.2098033     Document Type: Article

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