A 120-Gbit/s 1.27-W 520-mVpp 2:1 multiplexer IC using self-aligned InP/InGaAs/InP DHBTs with emitter mesa passivation

IEICE Transactions on Electronics

Volumn E93-C, Issue 8, 2010, Pages 1273-1278

  Arayashiki, Yutaka ^a   Ohkubo, Yukio ^a   Matsumoto, Taisuke ^a   Amano, Yoshiaki ^a   Takagi, Akio ^a   Matsuoka, Yutaka ^a  

^a Anritsu Device Corporation   (Japan)

Author keywords

Broadband impedance matching; DHBT; Ledge; Module; MUX; Self aligned

Indexed keywords

ELECTRIC LOSSES; GALLIUM COMPOUNDS; HETEROJUNCTIONS; III-V SEMICONDUCTORS; INDIUM PHOSPHIDE; INTEGRATED CIRCUITS; MULTIPLEXING EQUIPMENT; PASSIVATION; SEMICONDUCTING INDIUM PHOSPHIDE; TIMING CIRCUITS;

BROADBAND IMPEDANCE; DHBT; LEDGE; MODULE; SELF-ALIGNED;

HETEROJUNCTION BIPOLAR TRANSISTORS;

EID: 77955643532     PISSN: 09168524     EISSN: 17451353     Source Type: Journal    
DOI: 10.1587/transele.E93.C.1273     Document Type: Conference Paper

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