Challenges in the cell-based design of very-high-speed SiGe-bipolar ICs at 100 Gb/s

IEEE Journal of Solid-State Circuits

Volumn 43, Issue 9, 2008, Pages 1877-1888

  Möller, Michael ^a,b,c  

^a IEEE

^b SAARLAND UNIVERSITY   (Germany)

^c MICRAM MICROELECTRONIC GMBH   (Germany)

Author keywords

100 Gb s cell based design; Demultiplexer DEMUX; Dynamic offset; High speed ICs; High speed interfaces; Impedance mismatch; Modal effects; Multiplexer; MUX; SiGe bipolar technology

Indexed keywords

CYTOLOGY; INTEGRATED CIRCUIT MANUFACTURE; NETWORKS (CIRCUITS); SEMICONDUCTING GERMANIUM COMPOUNDS; SILICON ALLOYS;

100 GB/S CELL-BASED DESIGN; BIPOLAR CIRCUITS; CELL-BASED DESIGNS; CIRCUIT DESIGNS; DATA RATES; DEMULTIPLEXER; DEMULTIPLEXER DEMUX; DYNAMIC OFFSET; HIGH DATA RATES; HIGH SPEEDS; HIGH-SPEED ICS; HIGH-SPEED INTERFACES; IMPEDANCE MISMATCH; MODAL EFFECTS; MULTIPLEXER; MUX; ON CHIPS; PERFORMANCE LIMITATIONS; SIGE BIPOLAR TECHNOLOGY;

CELLS;

EID: 52249093972     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2008.2002334     Document Type: Article

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