Low supply voltage operation of over-40-Gb/s digital ICs based on parallel-current-switching latch circuitry

IEEE Journal of Solid-State Circuits

Volumn 40, Issue 10, 2005, Pages 2111-2116

  Amamiya, Yasushi ^a,b,c   Yamazaki, Zin ^a,b   Suzuki, Yasuyuki ^a,b,c   Mamada, Masayuki ^a,b   Hida, Hikaru ^a,b  

^a NEC CORPORATION   (Japan)

^b Photonic Wireless Devices Res Labs   (Japan)

^c Institute of Electronics   (Japan)

Author keywords

High speed; InP HBT; Low power dissipation; Low supply voltage; Multiplexer

Indexed keywords

HIGH SPEED; INP HBT; LOW POWER DISSIPATION; LOW SUPPLY VOLTAGE; MULTIPLEXER;

DEMULTIPLEXING; ELECTRIC CURRENTS; ELECTRIC POTENTIAL; ELECTRIC POWER SYSTEMS; FREQUENCY DIVISION MULTIPLEXING; HETEROJUNCTION BIPOLAR TRANSISTORS; SEMICONDUCTING INDIUM; SWITCHING; TOPOLOGY;

CMOS INTEGRATED CIRCUITS;

EID: 27844436073     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2005.854593     Document Type: Article

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