Three dimensional stress mapping of silicon surrounded by copper filled through silicon vias using polychromator-based multi-wavelength micro Raman spectroscopy

Applied Physics Express

Volumn 3, Issue 8, 2010, Pages

  Trigg, Alastair David ^a   Yu, Li Hong ^a   Cheng, Cheng Kuo ^a   Kumar, Rakesh ^a   Kwong, Dim Lee ^a   Ueda, Takeshi ^b   Ishigaki, Toshikazu ^b   Kang, Kitaek ^b   Yoo, Woo Sik ^b  

^a INSTITUTE OF MICROELECTRONICS   (Singapore)

^b WaferMasters Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

3-D INTERCONNECTS; CRYSTALLINITIES; FOCAL LENGTHS; MICRO RAMAN SPECTROSCOPY; MULTIWAVELENGTH; PACKAGING TECHNOLOGIES; POLYCHROMATORS; PROCESS-INDUCED VARIATION; STRESS CONTOURS; STRESS DISTRIBUTION; THREE-DIMENSIONAL (3D); THREE-DIMENSIONAL STRESS; THROUGH SILICON VIAS;

PACKAGING MATERIALS; RAMAN SCATTERING; RAMAN SPECTROSCOPY; SEMICONDUCTOR MATERIALS; STRESS CONCENTRATION;

THREE DIMENSIONAL;

EID: 77955501092     PISSN: 18820778     EISSN: 18820786     Source Type: Journal    
DOI: 10.1143/APEX.3.086601     Document Type: Article

References (15)

1. E. Beyne: Dig. Tech. Pap. IEEE Int. Solid-State Conf., New Jersey, 2004, p. 138.
2. E. Beyne: Tech. Dig. IEEE Int. Interconnect Technology Conf., New Jersey, 2006, p. 1.
3. J. Knickerbocker, P. Andry, B. Dang, R. Horton, M. Interrante, C. Patel, R. Polastre, K. Sakuma, R. Sirdeshmukh, E. Sprogis, S. Sri-Jayantha, A. Stephens, A. Topol, C. Tsang, B. Webb, and S. Wright: IBM J. Res. Dev. 52 (2008) 553.
4. K. H. Lu, X. Zhang, S. K. Ryu, J. Im, R. Huang, and P. S. Ho: Proc 59th Electronic Components and Technology Conf., San Diego CA, 2009, p. 630.
5. X. Liu, Q. Chen, P. Dixit, R. Chatterjee, R. R. Tummala, and S. K. Sitaraman: Proc 59th Electronic Components and Technology Conf., San Diego CA, 2009, p. 624.
6. C. S. Selvanayagam, J. H. Lau, X. Zhang, S. Seah, K. Vaidyanathan, and T. C. Chai: IEEE Trans. Adv. Packag. 32 (2009) 720.
7. C. S. Selvanayagam, X. Zhang, R. Rajoo, and D. Pinjala: Proc. 59th Electronic Components and Technology Conf., San Diego CA, 2009, p. 612.
8. C. Okoro, Y. Yang, B. Vandevelde, B. Swinnen, D. Vandepitte, B. Verlinden, and I. De Wolf: Proc. 10th IEEE Int. Interconnect Technology Conf., San Francisco CA, 2007, p. 16.
9. C. McDonough and R. E. Geer: Abstr. 215th Electrochem. Society Meeting, San Francisco (2009).
10. I. De Wolf: Semicond. Sci. Technol. 11 (1996) 139.
11. W. S. Yoo, T. Ueda, and K. Kang: Ext. Abstr. Int. Conf. Solid State Devices and Materials, 2008, p. 376.
12. W. S. Yoo, T. Ueda, and K. Kang: Ext. Abstr. 9th Int. Workshop Junction Technology, 2009, p. 79.
13. W. S. Yoo, K. Kang, T. Ueda, and T. Ishigaki: Appl. Phys. Express 2 (2009) 116502.
14. X. Zhang, T. C. Chai, J. H. Lau, C. S. Selvanayagam, K. Biswas, S. Liu, D. Pinjala, G. Y. Tang, Y. Y. Ong, S. R. Vempati, E. Wai, H. Y. Li, E. B. Liao, N. Ranganathan, V. Kripesh, J. Sun, J. Doricko, and C. J. Vath III: Proc. 59th Electronic Components and Technology Conf., San Diego CA, 2009, p. 305.
15. V. S. Rao, H. S. Wee, W. S. V. Lee, L. H. Yu, L. Ebin, R. Nagarajan, T. C. Chai, X. Zhang, and P. Damaruganath: Proc. 59th Electronic Components and Technology Conf., San Diego CA, 2009, p. 431.