3D interconnection and packaging: Impending reality or still a dream?

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 47, Issue , 2004, Pages

  Beyne, Eric ^a  

^a IMEC   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

INTERCONNECTIVITY; SYSTEM-IN-A-PACKAGE;

CAPACITANCE; ELECTRIC POWER UTILIZATION; ELECTRIC RESISTANCE; ELECTRONICS PACKAGING; ENCAPSULATION; MICROPROCESSOR CHIPS; ROUTERS; SILICON WAFERS;

INTEGRATED CIRCUITS;

EID: 2442641371     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)

1. G.Carchon et.al., IEEE-CPMT, vol. 24, pp. 510-519, 2001.
2. E.Beyne, Proc. IEDM, p. 3, Dec. 2001.