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Volumn , Issue , 2009, Pages 67-70

Elimination of spurious noise due to time-to-digital converter

Author keywords

[No Author keywords available]

Indexed keywords

ALL DIGITAL PHASE LOCKED LOOP; FINITE RESOLUTION; INTEGER-N; LOOP FILTER; PHASE DETECTION; QUANTIZATION ENERGY; QUANTIZATION NOISE; REFERENCE FREQUENCY; SPURIOUS TONES; TIME TO DIGITAL CONVERTERS;

EID: 77955367437     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DCAS.2009.5505727     Document Type: Conference Paper
Times cited : (16)

References (15)
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    • Staszewski, R.B.1    Muhammad, K.2    Leipold, D.3
  • 3
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    • All-digital PLL and transmitter for mobile phones
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    • R. B. Staszewski, J. Wallberg, S. Rezeq, et al., "All-digital PLL and transmitter for mobile phones," IEEE Journal of Soild-State Circuits, vol. 40, iss. 12, pp. 2469-2482, Dec. 2005.
    • (2005) IEEE Journal of Soild-State Circuits , vol.40 , Issue.12 , pp. 2469-2482
    • Staszewski, R.B.1    Wallberg, J.2    Rezeq, S.3
  • 5
    • 66149153864 scopus 로고    scopus 로고
    • A phase domain approach for mitigation of self-interference in wireless transceivers
    • May.
    • O. Eliezer, B. Staszewski, I. Bashir, S. Bhatara, and P. T. Balsara, "A phase domain approach for mitigation of self-interference in wireless transceivers," IEEE Journal af Solid-State Circuits, vol. 44, iss. 5, pp. 1436-1453, May. 2009.
    • (2009) IEEE Journal Af Solid-State Circuits , vol.44 , Issue.5 , pp. 1436-1453
    • Eliezer, O.1    Staszewski, B.2    Bashir, I.3    Bhatara, S.4    Balsara, P.T.5
  • 7
    • 84865431137 scopus 로고    scopus 로고
    • A 2MHz bandwidth low noise RF all digital PLL with 12ps resolution time-to-digital converter
    • Sept.
    • R. Tonietto, E. Zuffetti and R. Castello, "A 2MHz bandwidth low noise RF all digital PLL with 12ps resolution time-to-digital converter," Proc. of European Solid-State Circuits Conf, pp. 150-153, Sept. 2006.
    • (2006) Proc. of European Solid-State Circuits Conf , pp. 150-153
    • Tonietto, R.1    Zuffetti, E.2    Castello, R.3
  • 8
    • 49549111168 scopus 로고    scopus 로고
    • A low-noise, wide-BW 3.6GHz digital SA fractional-N synthesizer with a noise-shaping timeto-digital converter and quantization noise cancellation
    • Feb.
    • C.-M. Hsu, M. Z. Strayer and M. H. Perron, "A low-noise, wide-BW 3.6GHz digital SA fractional-N synthesizer with a noise-shaping timeto-digital converter and quantization noise cancellation," Proc. of IEEE Solid-State Circuits Conf., pp. 340-341, Feb. 2008.
    • (2008) Proc. of IEEE Solid-State Circuits Conf. , pp. 340-341
    • Hsu, C.-M.1    Strayer, M.Z.2    Perron, M.H.3
  • 9
    • 49549112279 scopus 로고    scopus 로고
    • A 3GHz fractional-N all-digital PLL with precise time-to-digital converter calibration and mismatch correction
    • Feb.
    • C. W. Wu, E. Temporiti, D. Baldi and E Svelto, "A 3GHz fractional-N all-digital PLL with precise time-to-digital converter calibration and mismatch correction," Proc. of IEEE Solid-State Circuits Conf, pp. 344-345, Feb. 2008.
    • (2008) Proc. of IEEE Solid-State Circuits Conf , pp. 344-345
    • Wu, C.W.1    Temporiti, E.2    Baldi, D.3    Svelto, E.4
  • 10
    • 51949095217 scopus 로고    scopus 로고
    • A low-noise, wideband digital phase-locked loop based on a new time-to-digital converter with subpicosecond resolution
    • June
    • M. Lee, M E. Heidari, A. A. Abidi, "A low-noise, wideband digital phase-locked loop based on a new time-to-digital converter with subpicosecond resolution," VLSI Symposium on Circuits, pp. 112 113, June 2008.
    • (2008) VLSI Symposium on Circuits , vol.113 , pp. 112
    • Lee, M.1    Heidari, M.E.2    Abidi, A.A.3
  • 13
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    • Event-driven simulation and modeling of phase noise of an RF oscillator
    • Apr.
    • R. B. Staszewski, C. Fernando, and P. T. Balsara, "Event-driven simulation and modeling of phase noise of an RF oscillator," IEEE Trans. on Circuits and Systems I, vol. 52, no. 4, pp. 723 733, Apr. 2005.
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  • 14
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    • May.
    • K. Muhammad, T Murphy, and R. B. Staszewski, "Verification of digital RF processors: RF, analog, baseband, and software," IEEE Journal of Solid-State Circuits, vol. 42, iss. 5, pp. 992 1002, May. 2007.
    • (2007) IEEE Journal of Solid-State Circuits , vol.42 , Issue.5 , pp. 9921002
    • Muhammad, K.1    Murphy, T.2    Staszewski, R.B.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.