A 24mm2 quad-band single-chip GSM radio with transmitter calibration in 90nm digital CMOS

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 51, Issue , 2008, Pages 208-210

  Staszewski, R B ^a   Leipold, D ^a   Eliezer, O ^a   Entezari, M ^a   Muhammad, K ^a   Bashir, I ^a   Hung, C M ^a   Wallberg, J ^a   Staszewski, R ^a   Cruise, P ^a   Rezeq, S ^a   Vemulapalli, S ^a   Waheed, K ^a   Barton, N ^a   Lee, M C ^a   Fernando, C ^a   Maggio, K ^a   Jung, T ^a   Elahi, I ^a   Larson, S ^a   Murphy, T ^a   Feygin, G ^a   Deng, I ^a   Mayhugh, T ^a   Ho, Y C ^a   Low, K M ^a   Lin, C ^a   Jaehnig, J ^a   Kerr, J ^a   Mehta, J ^a   Glock, S ^a   Almholt, T ^a   Bhatara, S ^a   more..

^a TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCKS; CMOS INTEGRATED CIRCUITS; ERROR STATISTICS; RADIO TRANSMISSION;

DIGITAL BASEBAND; DIGITAL CMOS; FREQUENCY REFERENCE; OUTPUT POWER; RF FRONT END; RF OSCILLATOR; SINGLE CHIPS; TRANSMIT-MODE;

DIGITAL RADIO;

EID: 49549123169     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2008.4523130     Document Type: Conference Paper

References (4)

1. P. H. Bonnaud, M. Hammes, A. Hanke et al., "A Fully Integrated SoC for GSM/GPRS in 0.13μm CMOS," ISSCC Dig. Tech. Papers, pp. 482-483, Feb. 2006.
2. S. Mehta, W. W. Si, H. Samavati et al., "A 1.9GHz Single-Chip CMOS PHS Cellphone," ISSCC Dig. Tech. Papers, pp. 484-485, Feb. 2006.
3. R. B. Staszewski, J. Wallberg, S. Rezeq et al., "All-Digital PLL and GSM/EDGE Transmitter in 90nm CMOS," ISSCC Dig. Tech. Papers, pp. 316-317, Feb. 2005.
4. K. Muhammad, Y.-C. Ho, T. Mayhugh et al., "A Discrete Time Quad-band GSM/GPRS Receiver in a 90nm Digital CMOS Process," Proc. IEEE CICC, pp. 809-812, Sept. 2005.