Intel 870: A building block for cost-effective, scalable servers

IEEE Micro

Volumn 22, Issue 2, 2002, Pages 36-47

  Briggs, Fayé ^a   Cekleov, Michel ^a   Creta, Ken ^a   Khare, Manoj ^a   Kulick, Steve ^a   Kumar, Akhilesh ^a   Looi, Lily Pao ^a   Natarajan, Chitra ^a   Radhakrishnan, Sivakumar ^a   Rankin, Linda ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CACHE MEMORY; CLIENT SERVER COMPUTER SYSTEMS; COMPUTER PERIPHERAL EQUIPMENT; COST EFFECTIVENESS; DATABASE SYSTEMS; ELECTRONIC COMMERCE; INTEGRATED CIRCUIT LAYOUT; INTERCONNECTION NETWORKS; INTERFACES (COMPUTER); INTERNET; MULTIPROCESSING SYSTEMS; NETWORK PROTOCOLS;

CACHE COHERENCE PROTOCOLS; DOUBLE DATA RATE MEMORY; DUAL INLINE MEMORY MODULES; ENTERPRISE SERVER SYSTEMS; SCALABILITY PORT; SHARED MEMORY SYSTEMS;

MICROPROCESSOR CHIPS;

EID: 0036504582     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/MM.2002.997878     Document Type: Article

References (11)

1. The symmetry multiprocessor system
2. SPARCcenter 2000: Multiprocessing for the 90's!
3. A 2.5GB/S bidirectional signaling technology