-
1
-
-
0003605996
-
The NAS parallel benchmarks (94)
-
Technical report, March
-
D. Bailey, E. Barszcz, J. Barton, D. Browning, R. Carter, L. Dagum, R. Fatoohi, S. Fineberg, P. Frederickson, T. Lasinski, R. Schreiber, H. Simon, V. Venkatakrishnan, and S. Weeratunga. The NAS parallel benchmarks (94). Technical report, RNR Technical Report RNR-94-007, March 1994.
-
(1994)
RNR Technical Report
, vol.RNR-94-007
-
-
Bailey, D.1
Barszcz, E.2
Barton, J.3
Browning, D.4
Carter, R.5
Dagum, L.6
Fatoohi, R.7
Fineberg, S.8
Frederickson, P.9
Lasinski, T.10
Schreiber, R.11
Simon, H.12
Venkatakrishnan, V.13
Weeratunga, S.14
-
2
-
-
0032761638
-
Impulse: Building a smarter memory controller
-
IEEE Computer Society
-
J. Carter, W. Hsieh, L. Stoller, M. Swanson, L. Zhang, E. Brunvand, A. Davis, C.-C. Kuo, R. Kuramkote, M. Parker, L. Schaelicke, and T. Tateyama. Impulse: Building a smarter memory controller. In Proceedings of the The Fifth International Symposium on High Performance Computer Architecture, page 70. IEEE Computer Society, 1999.
-
(1999)
Proceedings of the the Fifth International Symposium on High Performance Computer Architecture
, pp. 70
-
-
Carter, J.1
Hsieh, W.2
Stoller, L.3
Swanson, M.4
Zhang, L.5
Brunvand, E.6
Davis, A.7
Kuo, C.-C.8
Kuramkote, R.9
Parker, M.10
Schaelicke, L.11
Tateyama, T.12
-
3
-
-
84900298249
-
The starfire smp interconnect
-
ACM Press
-
A. Charlesworth, N. Aneshansley, M. Haakmeester, D. Drogichen, G. Gilbert, R. Williams, and A. Phelps. The starfire smp interconnect. In Proceedings of the 1997 ACM/IEEE Conference on Supercomputing (CDROM), pages 1-20. ACM Press, 1997.
-
(1997)
Proceedings of the 1997 ACM/IEEE Conference on Supercomputing (CDROM)
, pp. 1-20
-
-
Charlesworth, A.1
Aneshansley, N.2
Haakmeester, M.3
Drogichen, D.4
Gilbert, G.5
Williams, R.6
Phelps, A.7
-
4
-
-
4444379636
-
Design and implementation of the Power5 microprocessor
-
J. Clabes, J. Friedrich, M. Sweet, J. DiLullo, S. Chu, D. Plass, J. Dawson, P. Muench, L. Powell, M. Floyd, B. Sinharoy, M. Lee, M. Goulet, J. Wagoner, N. Schwartz, S. Runyon, G. Gorman, P. Restle, R. Kalla, J. McGill, and S. Dodson. Design and implementation of the Power5 microprocessor. In Proceedings of the 41st Annual Conference on Design Automation, pages 670-672, 2004.
-
(2004)
Proceedings of the 41st Annual Conference on Design Automation
, pp. 670-672
-
-
Clabes, J.1
Friedrich, J.2
Sweet, M.3
DiLullo, J.4
Chu, S.5
Plass, D.6
Dawson, J.7
Muench, P.8
Powell, L.9
Floyd, M.10
Sinharoy, B.11
Lee, M.12
Goulet, M.13
Wagoner, J.14
Schwartz, N.15
Runyon, S.16
Gorman, G.17
Restle, P.18
Kalla, R.19
McGill, J.20
Dodson, S.21
more..
-
7
-
-
3042669130
-
IBM Power5 chip: A dual-core multithreaded processor
-
R. Kalla, B. Sinharoy, and J. Tendler. IBM Power5 chip: A dual-core multithreaded processor. IEEE Micro, 24(2):40-47, 2004.
-
(2004)
IEEE Micro
, vol.24
, Issue.2
, pp. 40-47
-
-
Kalla, R.1
Sinharoy, B.2
Tendler, J.3
-
8
-
-
0035271572
-
Imagine: Media processing with streams
-
B. Khailany, W. J. Dally, U. J. Kapasi, P. Mattson, J. Namkoong, J. D. Owens, B. Towles, A. Chang, and S. Rixner. Imagine: Media processing with streams. IEEE Micro, 21(2):35-46, 2001.
-
(2001)
IEEE Micro
, vol.21
, Issue.2
, pp. 35-46
-
-
Khailany, B.1
Dally, W.J.2
Kapasi, U.J.3
Mattson, P.4
Namkoong, J.5
Owens, J.D.6
Towles, B.7
Chang, A.8
Rixner, S.9
-
9
-
-
0345025793
-
Stream: Sustainable memory bandwidth in high performance computers
-
J. D. McCalpin. Stream: Sustainable memory bandwidth in high performance computers. Technical report, http://www.cs.virginia.edu/stream/.
-
Technical Report
-
-
McCalpin, J.D.1
-
10
-
-
0034314462
-
Dynamic access ordering for streamed computations
-
S. A. McKee, W. A. Wulf, J. H. Aylor, M. H. Salinas, R. H. Klenke, S. I. Hong, and D. A. B. Weikle. Dynamic access ordering for streamed computations. IEEE Trans. Comput., 49(11):1255-1271, 2000.
-
(2000)
IEEE Trans. Comput.
, vol.49
, Issue.11
, pp. 1255-1271
-
-
McKee, S.A.1
Wulf, W.A.2
Aylor, J.H.3
Salinas, M.H.4
Klenke, R.H.5
Hong, S.I.6
Weikle, D.A.B.7
-
12
-
-
0033691565
-
Memory access scheduling
-
June
-
S. Rixner, W. J. Dally, U. J. Kapasi, P. Mattson, and J. D. Owens. Memory access scheduling. In Proceedings of the 27th Annual International Symposium on Computer Architecture, pages 128-138, June 2000.
-
(2000)
Proceedings of the 27th Annual International Symposium on Computer Architecture
, pp. 128-138
-
-
Rixner, S.1
Dally, W.J.2
Kapasi, U.J.3
Mattson, P.4
Owens, J.D.5
-
14
-
-
0036298603
-
Power4 system microarchitecture
-
J. M. Tendler, J. S. Dodson, J. S. Fields Jr., H. Lee, and B. Sinharoy. Power4 system microarchitecture. IBM Journal of Research and Development, 46(1): 5-26, 2002.
-
(2002)
IBM Journal of Research and Development
, vol.46
, Issue.1
, pp. 5-26
-
-
Tendler, J.M.1
Dodson, J.S.2
Fields Jr., J.S.3
Lee, H.4
Sinharoy, B.5
-
15
-
-
0026865523
-
Increasing the number of strides for conflict-free vector access
-
ACM Press
-
M. Valero, T. Lang, J. M. Llaber, M. Peiron, E. Ayguade;, and J. J. Navarra. Increasing the number of strides for conflict-free vector access. In Proceedings of the 19th Annual International Symposium on Computer Architecture, pages 372-381. ACM Press, 1992.
-
(1992)
Proceedings of the 19th Annual International Symposium on Computer Architecture
, pp. 372-381
-
-
Valero, M.1
Lang, T.2
Llaber, J.M.3
Peiron, M.4
Ayguade, E.5
Navarra, J.J.6
-
16
-
-
84990830919
-
Performance optimizations and bounds for sparse matrix-vector multiply
-
IEEE Computer Society Press
-
R. Vuduc, J. W. Demmel, K. A. Yelick, S. Kamil, R. Nishtala, and B. Lee. Performance optimizations and bounds for sparse matrix-vector multiply. In Proceedings of the 2002 ACM/IEEE Conference on Supercomputing, pages 1-35. IEEE Computer Society Press, 2002.
-
(2002)
Proceedings of the 2002 ACM/IEEE Conference on Supercomputing
, pp. 1-35
-
-
Vuduc, R.1
Demmel, J.W.2
Yelick, K.A.3
Kamil, S.4
Nishtala, R.5
Lee, B.6
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