Portable compiler optimisation across embedded programs and microarchitectures using machine learning

Proceedings of the Annual International Symposium on Microarchitecture, MICRO

Volumn , Issue , 2009, Pages 78-88

  Dubach, Christophe ^a   Jones, Timothy M ^a   Bonilla, Edwin V ^a   Fursin, Grigori ^b   O'Boyle, Michael F P ^a  

^a UNIVERSITY OF EDINBURGH   (United Kingdom)

^b INRIA SACLAY   (France)

Author keywords

Architecture compiler co design; Design space exploration; Machine learning

Indexed keywords

CO-DESIGNS; CONFIGURATION SPACE; HARDWARE COUNTERS; MACHINE-LEARNING; MICRO ARCHITECTURES; NEW SYSTEM; OPTIMISATIONS; PERFORMANCE POTENTIALS; TIME-CONSUMING TASKS;

LEARNING SYSTEMS; MACHINE DESIGN; OPTIMIZATION; SPACE RESEARCH;

PROGRAM COMPILERS;

EID: 76749114815     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1669112.1669124     Document Type: Conference Paper

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