A performance counter architecture for computing accurate CPI components

International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS

Volumn , Issue , 2006, Pages 175-184

  Eyerman, Stijn ^a   Eeckhout, Lieven ^a   Karkhanis, Tejas ^b   Smith, James E ^b  

^a GHENT UNIVERSITY   (Belgium)

^b UNIVERSITY OF WISCONSIN MADISON   (United States)

Author keywords

Hardware performance counter architecture; Superscalar processor performance modeling

Indexed keywords

HARDWARE PERFORMANCE COUNTER ARCHITECTURE; SUPERSCALAR PROCESSOR PERFORMANCE MODELING;

COMPUTER HARDWARE; MICROPROCESSOR CHIPS; MOBILE COMPUTING;

COMPUTER ARCHITECTURE;

EID: 34249813667     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1168857.1168880     Document Type: Conference Paper

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