Predicting the impact of optimizations for embedded systems

ACM SIGPLAN Notices

Volumn 38, Issue 7, 2003, Pages 1-11

  Zhao, Min ^a   Childers, Bruce ^a   Soffa, Mary Lou ^a  

^a University of Pittsburgh   (United States)

Author keywords

Code models; Embedded systems; Loop optimizations; Optimization models; Optimizing compilers; Prediction; Resource models

Indexed keywords

ALGORITHMS; CACHE MEMORY; COMPUTER SIMULATION; OPTIMIZATION; PERFORMANCE; PROGRAM COMPILERS; RESOURCE ALLOCATION;

CODE MODELS; LOOP OPTIMIZATIONS; OPTIMIZATION MODELS; RESOURCE MODELS;

EMBEDDED SYSTEMS;

EID: 1442337777     PISSN: 03621340     EISSN: None     Source Type: Journal    
DOI: 10.1145/780731.780734     Document Type: Conference Paper

References (25)

1. Ampro's EnCore Family of Processor-Independent Modules for Embedded Systems, 2000, http://www.ampro.com/assets/applets/EnCore_Backgrounder.PDF
2. D.C. Burger and T. M. Austin. The SimpleScalar Tool Set, Version 2.0, UW Computer Sciences Technical Report 1342, June, 1997.
3. M. Berry, D. Chen, P. Koss, D. Kuck and et al. PERFECT Club Benchmarks: Effective Performance Evaluation of Supercomputers. The International Journal of Supercomputer Applications, 1988.
4. D. Bacon, S. Graham, and O. Sharp. Compiler Transformations for High-Performance Computing. ACM Computing Surveys, 26(4): 345-420, December 1994.
5. Click, C. and Cooper, K. D. Combining Analyses, Combining Optimizations. ACM Transactions on Programming Languages and Systems (TOPLAS) March 1995.
6. B. Chandramouli, J. Carter, W. Hsieh, and S. McKee. A Cost Framework for Evaluating Integrated Restructuring Optimizations. International Conference on Parallel Architectures and Compilation Techniques, Barcelona, Spain, September 2001.
7. K. Cooper, D. Subramanian, and L. Torczon. Adaptive Optimizing Compilers for the 21st Century. Proceedings of the 2001 LACSI Symposium, Santa Fe, NM, USA, October, 2001.
8. S. Ghosh, M. Martonosi, and S. Malik. Cache Miss Equations: A Compiler Framework for Analyzing and Tuning Behavior. ACM Transactions on Programming Languages and Systems, 21(4): 703-746, July 1999.
9. S. Hu, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, H. Saputra, and W. Zhang. Compiler-Directed Cache Polymorphism. In Proc. of LCTES/SCOPES, June 2002.
10. M. Kandemir, J. Ramanujam, and A. Choudhary. Improving Cache Locality by a Combination of Loop and DAta Transformations. IEEE Transactions on Computers, Vol. 48, No. 2, February 1999.
11. C. Lee, M. Potkonjak, and W.H. Mangione-Smith, "MediaBench: A tool for evaluating and synthesizing multimedia and communication systems", 30th Int'l. Symposium on Microarchitecture (MICRO-30), December 1997.
12. K. McKinley, S. Carr, and C. Tseng. Improving Data Locality with Loop Transformations. ACM Transactions on Programming Languages and Systems, 18(4): 424-453, July 1996.
13. K. McKinley and O. Temam. A Quantitative Analysis of Loop Nest Locality. Proc. of the Seventh International Symposium on Architectural Support for Programming Languages and Operating Systems, October 1996.
14. G. Rivera and C. Tseng. Data Transformations for Eliminating Conflict Misses. In Proc. of SIGPLAN'98 Conference on Programming Language Design and Implementation, 1998.
15. V. Sarkar, Automatic Selection of high-order transformations in the IBM XL FORTRAN compilers, IBM Journal of Research and Development, May 1997.
16. V. Sarkar and R. Thekkath, A General Framework for Iteration-Reordering Loop Transformations. SIGPLAN Conf. on Programming Lang. Design and Implementation, 1992.
17. Jim Turley, Embedded Processors by the Numbers, http://www.embedded.com/1999/9905/9905turley.htm
18. O. Temam, C. Fricker and W. Jalby. Cache Interference Phenomena. In Proc. of SIGMETRICS Conference on Measurement and Modeling Computer Systems, 1994.
19. S. Triantafyllis, M. Vachharajani, N. Vachharajani, and D. I. August. Compiler Optimization-space Exploration. 1st International Symposium on Code Generation and Optimization, March 2003.
20. N. Vijaykrishnan, M. Kandemir, M. J. Irwin, H. Kim and W. Ye. A unified energy estimation framework with integrated hardware-software optimizations. In Proc. of the 27th International Symposium on Computer Architecture, 2000.
21. M. Wolf and M. Lam, A Data Locality Optimizing Algorithm, In Proc. of SIGPLAN'91 Conference on Programming Language Design and Implementation, Toronto, Canada, 1991.
22. D. Weikle, S. McKee, K. Skadron, and W. Wulf. Caches As Filters: A New Approach To Cache Analysis. 6th Intl. Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS'98), July 1998, Montreal Canada.
23. D. Whitfield and M. L. Soffa. An Approach for Exploring Code Improving Transformations. ACM Transactions on Programming Languages, 19(6):1053-1084, 1997.
24. W. Zhao, B. Cai, D. Whalley et al., VISTA: A System for Interactive Code Improvement, ACM Conf. On Languages, Compilers, and Tools for Embedded Systems, 2002.
25. V. Zivojnovic, J. Martinez, C. Schlager, and H. Meyr, DSPstone: A DSP-Oriented Benchmarking methodology, Proc. of International Conference on Signal Processing Applications and Technology, Dallas, Texas, Oct 1994.