A 150 GHz amplifier with 8 dB gain and +6 dBm Psat in digital 65 nm CMOS using dummy-prefilled microstrip lines

IEEE Journal of Solid-State Circuits

Volumn 44, Issue 12, 2009, Pages 3410-3421

  Seo, Munkyo ^a,b   Jagannathan, Basanth ^c   Pekarik, John ^d   Rodwell, Mark J W ^a  

^a University of California   (United States)

^b ROCKWELL SCIENTIFIC COMPANY   (United States)

^c IBM   (United States)

^d STMICROELECTRONICS   (France)

Author keywords

150 GHz amplifier; 65 nm; Amplifiers; CMOS millimeter wave integrated circuits; Dummy modeling; Matching loss; Metal filling; Millimeter wave integrated circuits; MMICs; Pattern density rules; Silicon; Transmission lines

Indexed keywords

150 GHZ AMPLIFIER; CMOS MILLIMETER WAVE INTEGRATED CIRCUITS; DUMMY MODELING; METAL FILLING; MILLIMETER-WAVE INTEGRATED CIRCUITS; PATTERN DENSITY; TRANSMISSION LINE;

BANDPASS FILTERS; ELECTRIC LINES; INTEGRATED CIRCUITS; MICROSTRIP LINES; MICROWAVE CIRCUITS; MILLIMETER WAVE DEVICES; MILLIMETER WAVES; MONOLITHIC MICROWAVE INTEGRATED CIRCUITS; TRANSMISSION LINE THEORY;

CMOS INTEGRATED CIRCUITS;

EID: 72949114934     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2009.2032273     Document Type: Conference Paper

References (44)

1. E. Laskin, K. W. Tang, K. H. K. Yau, P. Chevalier, A. Chantre, B. Sautreuil, and S. P. Voinigescu, "170-GHz transceiver with on-chip antennas in SiGe technology," in IEEE RFIC Symp. Dig., 2008, pp. 637-640.
2. S. T. Nicolson, A. Tomkins, K. W. Tang, A. Cathelin, D. Belot, and S. P. Voinigescu, "A 1.2 V, 140 GHz receiver with on-die antenna in 65 nm CMOS," in IEEE RFIC Symp. Dig., 2008, pp. 229-232.
3. E. Laskin, P. Chevalier, A. Chantre, B. Sautreuil, and S. P. Voinigescu, "80/160-GHz transceiver and 140-GHz amplifier in SiGe technology," in IEEE RFIC Symp. Dig., 2007, pp. 153-156.
4. B. Heydari, M. Bohsali, E. Adabi, and A. M. Niknejad, "Millimeterwave devices and circuit blocks up to 104 GHz in 90 nm CMOS," IEEE J. Solid-State Circuits, vol.42, no. 12, pp. 2893-2903, Dec. 2007.
5. D. Sandstrom, M. Varonen, M. Karkkainen, and K. Halonen, "W-band CMOS amplifiers achieving +10 dBm saturated output power and 7.5 dB NF," in IEEE ISSCC Dig. Tech. Papers, 2009, pp. 486-487.
6. J. F. Buckwalter and J. Kim, "A 26 dB-gain 100 GHz Si/SiGe cascaded constructive-wave amplifier," in IEEE ISSCC Dig. Tech. Papers, 2009, pp. 488-489.
7. Y.-S. Jiang, Z.-M. Tsai, J.-H. Tsai, H.-T. Chen, and H.Wang, "A 86 to 108 GHz amplifier in 90 nm CMOS," IEEE Microw.Wireless Compon. Lett., vol.18, no.2, pp. 124-126, Feb. 2008.
8. M. Seo, B. Jagannathan, C. Carta, J. Pekarik, L. Chen, C. P. Yue, and M. Rodwell, "A 1.1 V 150 GHz amplifier with 8 dB gain and +6 dBm saturated output power in standard digital 65 nm CMOS using dummyprefilled microstrip lines," in IEEE ISSCC Dig. Tech. Papers, 2009, pp. 484-485.
9. E. Laskin, M. Khanpour, R. Aroca, K. W. Tang, P. Garcia, and S. P. Voinigescu, "A 95 GHz receiver with fundamental-frequency VCO and static frequency divider in 65 nm digital CMOS," in IEEE ISSCC Dig. Tech. Papers, 2008, pp. 180-605.
10. M. Khanpour, K. W. Tang, P. Garcia, and S. P. Voinigescu, "A wideband W-band receiver front-end in 65- nm CMOS," IEEE J. Solid-State Circuits, vol.43, no.8, pp. 1717-1730, Aug. 2008.
11. N. Zhang, C.-M. Hung, and K. O. Kenneth, "80-GHz tuned amplifier in bulk CMOS," IEEE Microw. Wireless Compon. Lett., vol.18, no.2, pp. 121-123, Feb. 2008.
12. B. Martineau, A. Cathelin, F. Danneville, A. Kaiser, G. Dambrine, S. Lepilliet, F. Gianesello, and D. Belot, "80 GHz low noise amplifiers in 65 nm CMOS SOI," in Proc. European Solid-State Circuit Conf. (ESSCIRC), 2007, pp. 348-351.
13. S. T. Nicolson and S. P. Voinigescu, "Methodology for simultaneous noise and impedance matching in W-band LNAs," in Proc. IEEE Compound Semiconductor Integrated Circuit Symp., 2006, pp. 279-282.
14. T. Suzuki, Y. Kawano, M. Sato, T. Hirose, and K. Joshin, "60 and 77 GHz power amplifiers in standard 90 nm CMOS," in IEEE ISSCC Dig. Tech. Papers, 2008, pp. 562-636.
15. Y. Jiang, J. Tsai, and H. Wang, "A W-band medium power amplifier in 90 nm CMOS," IEEE Microw. Wireless Compon. Lett., vol.18, no.12, pp. 818-820, Dec. 2008.
16. N. Kukutsu, A. Hirata, T. Kosugi, H. Takahashi, R. Yamaguchi, T. Nagatsuma, and Y. Kado, "10-Gbit/s wireless link systems using the 120-GHz band," in Proc. IEEE Int. Symp. Antennas and Propagation, 2008, pp. 1-4.
17. A. Hirata, N. Iai, H. Ikegawa, T. Inada, Y. Kado, S. Kimura, T. Kosugi, N. Kukutsu, K. Murata, T. Nagatsuma, T. Nakayama, H. Nishikawa, S. Okabe, H. Takahashi, and R. Yamaguchi, "10-Gbit/s wireless link using InP HEMT MMICs for generating 120-GHz-band millimeterwave signal," IEEE Microw. Theory Tech., accepted for publication.
18. H. P. Moyer, J. J. Lynch, J. N. Schulman, R. L. Bowen, J. H. Schaffner, A. K. Kurdoghlian, and T. Y. Hsu, "A low noise chipset for passive millimeter wave imaging," in IEEE MTT-S Int. Microwave Symp. Dig., 2007, pp. 1363-1366.
19. J. W. May and G. M. Rebeiz, "A W-band SiGe 1.5 V LNA for imaging applications," in IEEE RFIC Symp. Dig., 2008, pp. 241-244.
20. S. Pellerano, Y. Palaskas, and K. Soumyanath, "A 64 GHz LNA with 15.5 dB gain and 6.5 dB NF in 90 nm CMOS," IEEE J. Solid-State Circuits, vol.43, no.7, pp. 1542-1552, Jul. 2008.
21. A. Hajimiri, "(Invited) mm-wave silicon ICs: An opportunity for holistic design," in IEEE RFIC Symp. Dig., 2008, pp. 357-360.
22. A. Cathelin, B. Martineau, N. Seller, F. Gianesello, C. Raynaud, and D. Belot, "Deep-submicron digital CMOS potentialities for millimeterwave applications," in IEEE RFIC Symp. Dig., 2008, pp. 53-56, (Invited).
23. A. M. Mangan, S. P. Voinigescu, M.-T. Yang, and M. Tazlauanu, "Deembedding transmission line measurements for accurate modeling of IC designs," IEEE Trans. Electron Devices, vol.53, no.2, pp. 235-241, Feb. 2006.
24. D. Scagnelli, C. Grant, K. Carrig, T. Kemerer, H. Landis, T. McDevitt, J.-t. Sucharitaves, E. Tsai, M. Kumar, and P. Pastel, "Pattern density methodology using IBM foundry technologies," in Proc. 57th Electronic Components and Technology Conf., 2007, ECTC '07, pp. 1300-1307.
25. B. E. Stine, D. S. Boning, J. E. Chung, L. Camilletti, F. Kruppa, E. R. Equi, W. Loh, S. Prasad, M. Muthukrishnan, D. Towery, M. Berman, and A. Kapoor, "The physical and electrical effects of metal-fill patterning practices for oxide chemical-mechanical polishing processes," IEEE Trans. Electron Devices, vol.45, no.3, pp. 665-679, Mar. 1998.
26. M. Varonen, M. Karkkainen, M. Kantanen, and K. Halonen, "Millimeter- wave integrated circuits in 65-nm CMOS," IEEE J. Solid-State Circuits, vol.43, no.9, pp. 1991-2002, Sep. 2008.
27. T. S. D. Cheung and J. R. Long, "Shielded passive devices for siliconbased monolithic microwave and millimeter-wave integrated circuits," IEEE J. Solid-State Circuits, vol.41, no.5, pp. 1183-1200, May 2006.
28. L. F. Tiemeijer, R. J. Havens, Y. Bouttement, and H. J. Pranger, "Physics-based wideband predictive compact model for inductors with high amounts of dummy metal fill," IEEE Trans. Microw. Theory Tech., vol.54, no.8, pp. 3378-3386, Aug. 2006.
29. S. G. Gaskill, V. S. Shilimkar, and A. Weisshaar, "Accurate closedform capacitance extraction formulas for metal fill in RFICs," in IEEE RFIC Symp. Dig., 2009, pp. 611-614.
30. M. P. van der Heijden, L. C. N. de Vreede, and J. N. Burghartz, "On the design of unilateral dual-loop feedback low-noise amplifiers with simultaneous noise, impedance, and IIP3 match," IEEE J. Solid-State Circuits, vol.39, no. 10, pp. 1727-1736, Oct. 2004.
31. Z.-M. Tsai, K.-J. Sun, G. D. Vendelin, and H. Wang, "A new feedback method for power amplifier with unilateralization and improved output return loss," IEEE Trans. Microw. Theory Tech., vol.54, no.4, pp. 1590- 1597, Jun. 2006.
32. B. Heydari, E. Adabi, M. Bohsali, B. Afshar, A. Arbabian, and A. M. Niknejad, "Internal unilaterization technique for CMOS mm-wave amplifiers," in IEEE RFIC Symp. Dig., 2007, pp. 463-466.
33. S. T. Nicolson, P. Chevalier, B. Sautreuil, and S. P. Voinigescu, "Single-chip W-band SiGe HBT transceivers and receivers for Doppler radar and millimeter-wave imaging," IEEE J. Solid-State Circuits, vol.43, no.10, pp. 2206-2217, Oct. 2008.
34. C. H. Doan, S. Emami, A. M. Niknejad, and R. W. Brodersen, "Millimeter- wave CMOS design," IEEE J. Solid-State Circuits, vol.40, no.1, pp. 144-155, Jan. 2005.
35. I. C. H. Lai and M. Fujishima, "High-Q slow-wave transmission line for chip area reduction on advanced CMOS processes," in IEEE Int. Conf. Microelectronic Test Structures 2007, ICMTS '07. , pp. 192-195.
36. F. Gianesello, D. Gloria, S. Montusclat, C. Raynaud, S. Boret, C. Clement, G. Dambrine, S. Lepilliet, F. Saguin, P. Scheer, P. Benech, and J. M. Fournier, "65 nm RFCMOS technologies with bulk and HR SOI substrate for millimeter wave passives and circuits characterized up to 220 GHZ," in IEEE MTT-S Int. Microwave Symp. Dig., 2006, pp. 1927-1930.
37. M. T. Yang, P. P. C. Ho, T. J. Yeh, Y. J. Wang, D. C. W. Kuo, C. W. Kuo, S. C. Yang, A. Mangan, S. P. Voinigescu, and S. Liu, "On the millimeter-wave characteristics and model of on-chip interconnect transmission lines up to 110 GHz," in IEEE MTT-S Int. Microwave Symp. Dig., Jun. 2005, p. 4.
38. W. R. Eisenstadt and Y. Eo, "S-parameter-based IC interconnect transmission line characterization," IEEE Trans. Compon., Hybrids, Manufact. Technol., vol.15, no. 4, pp. 483-490, Aug. 1992.
39. T. O. Dickson, K. H. K. Yau, T. Chalvatzis, A. M. Mangan, E. Laskin, R. Beerkens, P. Westergaard, M. Tazlauanu, M.-T. Yang, and S. P. Voinigescu, "The invariance of characteristic current densities in nanoscale MOSFETs and its impact on algorithmic design methodologies and design porting of Si(Ge) (Bi)CMOS high-speed building blocks," IEEE J. Solid-State Circuits, vol.41, no.8, pp. 1830-1845, Aug. 2006.
40. W. R. Deal, X. B. Mei, V. Radisic, W. Yoshida, P. H. Liu, J. Uyeda, M. Barsky, T. Gaier, A. Fung, and R. Lai, "Demonstration of a S-MMIC LNA with 16-dB gain at 340-GHz," in Proc. IEEE Compound Semiconductor Integrated Circuit Symp. 2007, CSIC '07. , pp. 1-4.
41. X. B. Mei, W. Yoshida, W. R. Deal, P. H. Liu, J. Lee, J. Uyeda, L. Dang, J. Wang, W. Liu, D. Li, M. Barsky, Y. M. Kim, M. Lange, T. P. Chin, V. Radisic, T. Gaier, A. Fung, L. Samoska, and R. Lai, "35-nm InP HEMT SMMIC amplifier with 4.4-dB gain at 308 GHz," IEEE Electron Device Lett., vol.28, no.6, pp. 470-472, Jun. 2007.
42. J. Hacker,M. Urteaga, D. Mensa, R. Pierson, M. Jones, Z. Griffith, and M. Rodwell, "250 nm InP DHBT monolithic amplifiers with 4.8 dB gain at 324 GHz," in IEEE MTT-S Int. Microwave Symp. Dig., 2008, pp. 403- 406.
43. A. Fung, L. Samoska, T. Gaier, V. Radisic, D. Sawdai, D. Scott, W. R. Deal, L. Dang, D. Li, A. Cavus, R. To, and R. Lai, "Demonstration of 184 and 255-GHz amplifiers using InP HBT technology," IEEE Microw. Wireless Compon. Lett., vol.18, no.4, pp. 281-283, Apr. 2008.
44. D. Huang, W. Hant, N.-Y. Wang, T. W. Ku, Q. Gu, R. Wong, and M. F. Chang, "A 60 GHz CMOS VCO using on-chip resonator with embedded artificial dielectric for size, loss and noise reduction," in IEEE ISSCC Dig. Tech. Papers, 2006, pp. 1218-1227.