(INVITED) deep-submicron digital CMOS potentialities for millimeter-wave applications

Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium

Volumn , Issue , 2008, Pages 53-56

  Cathelin, Andreia ^a   Martineau, Baudouin ^a,b   Seller, Nicolas ^a,c   Gianesello, Frédéric ^a   Raynaud, Christine ^a,d   Belot, Didier ^a  

^a STMICROELECTRONICS   (France)

^b INSTITUT D ELECTRONIQUE   (France)

^c UNIVERSITÉ BORDEAUX 1   (France)

^d CEA LETI   (France)

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL INTEGRATED CIRCUITS; ELECTRONICS INDUSTRY; MILLIMETER WAVES; RADIO WAVES; TECHNOLOGY;

ACTIVE DEVICES; DEEP-SUB MICRON; DEEP-SUBMICRON CMOS; DIGITAL CMOS; FUTURE CHALLENGES; MILLIMETER-WAVE APPLICATIONS; RADIO FREQUENCY INTEGRATED CIRCUITS; SOI CMOS; SYSTEM INTEGRATION;

INTEGRATED CIRCUITS;

EID: 51849135408     PISSN: 15292517     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RFIC.2008.4561384     Document Type: Conference Paper

References (12)

1. A. Cathelin, et al. "Design for Millimeter-wave Applications in Silicon Technologies", ESSCIRC 2007, Munich, Sept. 2007
2. "mm-wave Silicon Technology: 60GHz and Beyond", edited by A.M. Niknejad and H. Hashemi, Springer, 2008
3. P. Chevalier, et al., "Advanced SiGe BiCMOS and CMOS platforms for Optical and mmW-Wave Integrated Circuits", IEEE CSICS 2006
4. C. Raynaud, "Advanced SOI Technology for RF Applications", 2007 IEEE International SOI ConferenceShort Course
5. B. Heydari, et al., "Low Power mm-Wave Components up to 104 GHz in 90nm CMOS", ISSCC2007, San Francisco, Feb. 2007
6. B. Martineau, et al., "80 GHz Low Noise Amplifiers in 65nm CMOS SOI", ESSCIRC2007, Munich, Sept. 2007
7. B. Martineau, A. Cathelin, "Optimized MOS topology on CMOS process for millimeter wave design", FR Patent Application, September 2007
8. B. Martineau, "Potentialités des technologies CMOS 65nm SOI LP pour des applications en bande millimétrique", PhD Thesis to be presented at the Université des Sciences et Technologies de Lille, March 2008
9. T.O. Dickson, et al., "The Invariance of Characteristic Current Densities in Nanoscale MOSFETs and Its Impact on Algorithmic Design Methodologies and Design Porting of Si(Ge) (Bi)CMOS High-Speed Building Blocks". IEEE JSSC, vol. 41, No. 8, Aug. 2006
10. S. Pruvost, " Etude de faisabilité de circuits pour systèmes de communication en bande millimétrique, en technologie BiCMOS SiGeC 0.13μm", PhD Thesis presented at the Université des Sciences et Technologies de Lille, Nov. 25 2005
11. F. Gianesello, "Evaluation de la technologie CMOS SOI Haute-Résistivité pour applications RF jusqu'en bande millimétrique", PhD Thesis presented at the Institut Polytechnique de Grenoble, France, October 2006
12. N. Seller, et al., "A 10GHz Distributed Voltage Controlled Oscillator for WLAN Application in a VLSI 65nm CMOS Process", RFIC2007, Honolulu, June 2007