Supporting task migration in multi-processor systems-on-chip: A feasibility study

Proceedings -Design, Automation and Test in Europe, DATE

Volumn 1, Issue , 2006, Pages

  Bertozzi, Stefano ^a   Acquaviva, Andrea ^a   Bertozzi, Davide ^b   Poggiali, Antonio ^c  

^a UNIVERSITY OF URBINO   (Italy)

^b UNIVERSITY OF FERRARA   (Italy)

^c UNIVERSITY OF BOLOGNA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUITS; MIDDLEWARE; PRODUCT DEVELOPMENT; SENSITIVITY ANALYSIS; SOFTWARE ENGINEERING; VIRTUAL REALITY;

CODE CHECKPOINTING; MPSOC APPLICATION DOMAINS; SOFTWARE INFRASTRUCTURE;

MULTIPROCESSING SYSTEMS;

EID: 34047125437     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/date.2006.243952     Document Type: Conference Paper

References (18)

1. Barak A., La'adan O. and Shiloh A., '"Scalable Cluster Computing with MOSIX for Linux,'" Proc. Linux Expo '99, pp. 95-100, 1999.
2. P. E. Chung, Y. Huang, S. Yajnik, G. Fowler, K. P. Vo, and Y. M. Wang, Checkpointing in CosMiC: a User-level Process Migration Environment," Proceedings of Pacific Rim International Symposium on Fault-Tolerant Systems, 1997.
3. D. Pham et al. "The design and implementation of a first generation CELL processor". IEEE/ACM ISSCC, pp. 184-186, 2005. July 2003.
4. F. Douglis and J. Ousterhout, '"Transparent Process Migration: Design Alternatives and the -Sprite Implementation,'" Software-Practice and Experience, 21(8.1:757-785, August 1991.
5. S. Dharmasanam, '"Multiprocessing with real-time operating systems,'" http://www.embedded.com/story/OEG20030512S0080
6. Intel, '"Multiprocessor Specification,'" http://www.intel.com/ design/pentium/datashts/242016.htm
7. F. Li and M. Kandemir, '"Locality-conscious workload assignment for array-based computations in MPSOC architectures,'" Proceedings of the 42nd annual conference on Design automation, pp. 95-100, 2005.
8. ARM Limited, '"MPCore Linux 2.6 SMP kernel and tools,'" www.arm.com/products/CPUs/linux2_6_smp.html
9. M.T. Kandemir, G. Chen, '"Locality-Aware Process Scheduling for Embedded MPSoCs,"' Proceedings of DATE, pp. 870-875, 2005.
10. MPARM, http://www-micrel.deis.unibo.it/sitonew/research/mparm.html
11. V. Nollet, P. Avasare, J. Mignolet, D. Verkest, '"Low Cost Task Migration Initiation in a Heterogeneous MP-SoC,'" DATE, pp. 252-253, 2005.
12. L. Friebe, H.-J. Stolberg, M. Berekovic, S. Moch, M. B. Kulaczewski, A. Dehnhardt, P. Pirsch, "HiBRID-SoC: A System-on-Chip Architecture with Two Multimedia DSPs and a RISC Core," IEEE International SOC Conference, September 2003, pp. 85-88.
13. P. Schaumont, Bo. Lai, W. Qin, I. Verbauwhede, '"Cooperative multithreading on 3mbedded multiprocessor architectures enables energy-scalable design,'" DAC, pp. 27-30, 2005.
14. R. D. Nelson, M. S. Squillante, '"Modeling and Analysis of Task Migration in Shared-Memory Computer Systems,'", MASCOTS, pp. 261-266, 1996.
15. D. Milojicic, F. Douglis, Y. Paindaveine, R. Wheeler, S. Zhou, Process Migration Survey, ACM Computing Surveys, September 2000.
16. uClinux, '"Embedded Linun Microcontroller Project,'" www.uclinun.org/
17. P. van der Wolf, E. de Kock, T. Henriksson, W. Kruijtzer, G. Essink, "'Design and programming of embedded multiprocessors: an interface-centric approach,'" CODES+ISSS, pp. 206-217, 2004.
18. E. Zayas, '"Attacking the process migration bottleneck,'" Proceedings of the eleventh ACM Symposium on Operating systems principles, pp. 13-24, 1987.