Fault-tolerant XGFT network-on-chip for multi-processor system-on-chip circuits

Proceedings - 2005 International Conference on Field Programmable Logic and Applications, FPL

Volumn 2005, Issue , 2005, Pages 203-210

  Kariniemi, Heikki ^a   Nurmi, Jari ^a  

^a TAMPERE UNIVERSITY OF TECHNOLOGY   (Finland)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; FAULT TOLERANT COMPUTER SYSTEMS; FORMAL LOGIC; PACKET NETWORKS; PERFORMANCE; QUALITY OF SERVICE;

EXTENDED GENERALIZED FAT TREE (XGFT); NETWORK-ON-CHIP (NOC); TURN-BACK (TB) ROUTING;

INTEGRATED CIRCUITS;

EID: 33746931743     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPL.2005.1515723     Document Type: Conference Paper

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