메뉴 건너뛰기




Volumn 56, Issue 11, 2009, Pages 2726-2732

Degradation of metal-induced laterally crystallized n-type polycrystalline silicon thin-film transistors under synchronized voltage stress

Author keywords

Hot carrier (HC); Metal induced lateral crystallization (MILC); Polycrystalline silicon (poly Si); Self heating (SH); Synchronized voltage stress; Thin film transistors (TFTs)

Indexed keywords

METAL-INDUCED LATERAL CRYSTALLIZATION (MILC); POLYCRYSTALLINE SILICON (POLY-SI); SELF-HEATING (SH); SYNCHRONIZED VOLTAGE STRESS; THIN-FILM TRANSISTORS (TFTS);

EID: 70350728402     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2009.2030720     Document Type: Article
Times cited : (28)

References (19)
  • 1
    • 33847643162 scopus 로고    scopus 로고
    • Degradation behaviors of metal-induced laterally crystallized n-type polycrystalline silicon thin-film transistors under DC bias stresses
    • Feb
    • M. Xue, M. Wang, Z. Zhu, D. Zhang, and M. Wong, "Degradation behaviors of metal-induced laterally crystallized n-type polycrystalline silicon thin-film transistors under DC bias stresses," IEEE Trans. Electron Devices, vol. 54, no. 2, pp. 225-232, Feb. 2007.
    • (2007) IEEE Trans. Electron Devices , vol.54 , Issue.2 , pp. 225-232
    • Xue, M.1    Wang, M.2    Zhu, Z.3    Zhang, D.4    Wong, M.5
  • 2
    • 85008047843 scopus 로고    scopus 로고
    • Stress power dependent self-heating degradation of metal-induced laterally crystallized n-type polycrystalline silicon thin-film transistors
    • Dec
    • H. Wang, M. Wang, Z. Yang, H. Hao, and M. Wong, "Stress power dependent self-heating degradation of metal-induced laterally crystallized n-type polycrystalline silicon thin-film transistors," IEEE Trans. Electron Devices, vol. 54, no. 12, pp. 3276-3284, Dec. 2007.
    • (2007) IEEE Trans. Electron Devices , vol.54 , Issue.12 , pp. 3276-3284
    • Wang, H.1    Wang, M.2    Yang, Z.3    Hao, H.4    Wong, M.5
  • 4
    • 34249802599 scopus 로고    scopus 로고
    • A novel voltage driving method using 3-TFT pixel circuit for AMOLED
    • Jun
    • C.-L. Lin and T.-T. Tsai, "A novel voltage driving method using 3-TFT pixel circuit for AMOLED," IEEE Electron Device Lett., vol. 28, no. 6, pp. 489-491, Jun. 2007.
    • (2007) IEEE Electron Device Lett , vol.28 , Issue.6 , pp. 489-491
    • Lin, C.-L.1    Tsai, T.-T.2
  • 5
    • 0742321660 scopus 로고    scopus 로고
    • Hot carrier analysis in low-temperature poly-Si TFTs using picosecond emission microscope
    • Jan
    • Y. Uraoka, N. Hirai, H. Yano, T. Hatayama, and T. Fuyuki, "Hot carrier analysis in low-temperature poly-Si TFTs using picosecond emission microscope," IEEE Trans. Electron Devices, vol. 51, no. 1, pp. 28-34, Jan. 2004.
    • (2004) IEEE Trans. Electron Devices , vol.51 , Issue.1 , pp. 28-34
    • Uraoka, Y.1    Hirai, N.2    Yano, H.3    Hatayama, T.4    Fuyuki, T.5
  • 6
    • 0035471242 scopus 로고    scopus 로고
    • Reliability of low temperature poly-silicon TFTs under inverter operation
    • Oct
    • Y. Uraoka, T. Hatayama, T. Fuyuki, T. Kawamura, and Y. Tsuchihashi, "Reliability of low temperature poly-silicon TFTs under inverter operation," IEEE Trans. Electron Devices, vol. 48, no. 10, pp. 2370-2374, Oct. 2001.
    • (2001) IEEE Trans. Electron Devices , vol.48 , Issue.10 , pp. 2370-2374
    • Uraoka, Y.1    Hatayama, T.2    Fuyuki, T.3    Kawamura, T.4    Tsuchihashi, Y.5
  • 7
    • 0036529444 scopus 로고    scopus 로고
    • Hot carrier induced degradation in the low temperature processed polycrystalline silicon thin film transistors using the dynamic stress
    • Apr
    • K. M. Chang, Y. H. Chung, and G. M. Lin, "Hot carrier induced degradation in the low temperature processed polycrystalline silicon thin film transistors using the dynamic stress," Jpn. J. Appl. Phys. vol. 41, no. 4A, pp. 1941-1946, Apr. 2002.
    • (2002) Jpn. J. Appl. Phys , vol.41 , Issue.4 A , pp. 1941-1946
    • Chang, K.M.1    Chung, Y.H.2    Lin, G.M.3
  • 8
    • 2942666043 scopus 로고    scopus 로고
    • A new model for device degradation in low-temperature n-channel polycrystalline silicon TFTs under AC stress
    • Jun
    • Y. Toyota, T. Shiba, and M. Ohkura, "A new model for device degradation in low-temperature n-channel polycrystalline silicon TFTs under AC stress," IEEE Trans. Electron Devices, vol. 51, no. 6, pp. 927-933, Jun. 2004.
    • (2004) IEEE Trans. Electron Devices , vol.51 , Issue.6 , pp. 927-933
    • Toyota, Y.1    Shiba, T.2    Ohkura, M.3
  • 9
    • 23344435133 scopus 로고    scopus 로고
    • Effects of the timing of AC stress on device degradation produced by trap states in low-temperature polycrystalline-silicon TFTs
    • Aug
    • Y. Toyota, T. Shiba, and M. Ohkura, "Effects of the timing of AC stress on device degradation produced by trap states in low-temperature polycrystalline-silicon TFTs," IEEE Trans. Electron Devices, vol. 52, no. 8, pp. 1766-1771, Aug. 2005.
    • (2005) IEEE Trans. Electron Devices , vol.52 , Issue.8 , pp. 1766-1771
    • Toyota, Y.1    Shiba, T.2    Ohkura, M.3
  • 10
    • 32544457582 scopus 로고    scopus 로고
    • Comprehensive study on reliability of low-temperature poly-Si thin-film transistors under dynamic complimentary metal-oxide semiconductor operations
    • Apr
    • Y. Uraoka, H. Yano, T. Hatayama, and T. Fuyuki, "Comprehensive study on reliability of low-temperature poly-Si thin-film transistors under dynamic complimentary metal-oxide semiconductor operations," Jpn. J. Appl. Phys., vol. 41, no. 4B, pp. 2414-2418, Apr. 2002.
    • (2002) Jpn. J. Appl. Phys , vol.41 , Issue.4 B , pp. 2414-2418
    • Uraoka, Y.1    Yano, H.2    Hatayama, T.3    Fuyuki, T.4
  • 11
    • 33947244303 scopus 로고    scopus 로고
    • Analysis of poly-Si TFT degradation under gate pulse stress using the slicing model
    • Dec
    • Y.-H. Tai, S.-C. Huang, and C.-K. Chen, "Analysis of poly-Si TFT degradation under gate pulse stress using the slicing model," IEEE Electron Device Lett., vol. 27, no. 12, pp. 981-983, Dec. 2006.
    • (2006) IEEE Electron Device Lett , vol.27 , Issue.12 , pp. 981-983
    • Tai, Y.-H.1    Huang, S.-C.2    Chen, C.-K.3
  • 12
    • 31744439466 scopus 로고    scopus 로고
    • Dependence of self-heating effects on operation conditions and device structures for polycrystalline silicon TFTs
    • Feb
    • K. Takechi, M. Nakata, H. Kanoh, S. Otsuki, and S. Kaneko, "Dependence of self-heating effects on operation conditions and device structures for polycrystalline silicon TFTs," IEEE Trans. Electron Devices, vol. 53, no. 2, pp. 251-257, Feb. 2006.
    • (2006) IEEE Trans. Electron Devices , vol.53 , Issue.2 , pp. 251-257
    • Takechi, K.1    Nakata, M.2    Kanoh, H.3    Otsuki, S.4    Kaneko, S.5
  • 13
    • 33847652093 scopus 로고    scopus 로고
    • Thermal degradation under pulse operation in low-temperature p-channel poly-Si thin-film transistors
    • Feb
    • S. Hashimoto, K. Kitajima, Y. Uraoka, T. Fuyuki, and Y. Morita, "Thermal degradation under pulse operation in low-temperature p-channel poly-Si thin-film transistors," IEEE Trans. Electron Devices, vol. 54, no. 2, pp. 297-300, Feb. 2007.
    • (2007) IEEE Trans. Electron Devices , vol.54 , Issue.2 , pp. 297-300
    • Hashimoto, S.1    Kitajima, K.2    Uraoka, Y.3    Fuyuki, T.4    Morita, Y.5
  • 14
    • 0023542548 scopus 로고
    • The impact of gate-induced drain leakage current on MOSFET scaling
    • T. Y. Chan, J. Chen, P. K. Ko, and C. Hu, "The impact of gate-induced drain leakage current on MOSFET scaling," in IEDM Tech. Dig., 1987, pp. 718-721.
    • (1987) IEDM Tech. Dig , pp. 718-721
    • Chan, T.Y.1    Chen, J.2    Ko, P.K.3    Hu, C.4
  • 15
    • 63349090913 scopus 로고    scopus 로고
    • Finite element analysis of temperature distribution of polycrystalline silicon thin film transistors under self-heating stress
    • Jun
    • H. Wang, M. Wang, and Z. Yang, "Finite element analysis of temperature distribution of polycrystalline silicon thin film transistors under self-heating stress," Front. Elect. Electron. Eng. China, vol. 4, no. 2, pp. 227-233, Jun. 2009.
    • (2009) Front. Elect. Electron. Eng. China , vol.4 , Issue.2 , pp. 227-233
    • Wang, H.1    Wang, M.2    Yang, Z.3
  • 16
    • 0001293246 scopus 로고    scopus 로고
    • Dependence of polycrystalline silicon thin-film transistor characteristics on the grain-boundary location
    • Jan
    • M. Kimura, S. Inoue, T. Shimoda, and T. Enguchi, "Dependence of polycrystalline silicon thin-film transistor characteristics on the grain-boundary location," J. Appl. Phys., vol. 89, no. 1, pp. 596-600, Jan. 2001.
    • (2001) J. Appl. Phys , vol.89 , Issue.1 , pp. 596-600
    • Kimura, M.1    Inoue, S.2    Shimoda, T.3    Enguchi, T.4
  • 18
    • 41749120315 scopus 로고    scopus 로고
    • An analytical expression for drain saturation voltage of polycrystalline silicon thin-film transistors
    • Apr
    • H. Hao, M. Wang, and M. Wong, "An analytical expression for drain saturation voltage of polycrystalline silicon thin-film transistors," IEEE Electron Device Lett., vol. 29, no. 4, pp. 357-359, Apr. 2008.
    • (2008) IEEE Electron Device Lett , vol.29 , Issue.4 , pp. 357-359
    • Hao, H.1    Wang, M.2    Wong, M.3
  • 19
    • 0030241288 scopus 로고    scopus 로고
    • Threshold voltage, field effect mobility, and gate-to-channel capacitance in polysilicon TFTs
    • Sep
    • M. D. Jacunski, M. S. Shur, and M. Hack, "Threshold voltage, field effect mobility, and gate-to-channel capacitance in polysilicon TFTs," IEEE Trans. Electron Devices, vol. 43, no. 9, pp. 1433-1440, Sep. 1996.
    • (1996) IEEE Trans. Electron Devices , vol.43 , Issue.9 , pp. 1433-1440
    • Jacunski, M.D.1    Shur, M.S.2    Hack, M.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.