Analysis of poly-Si TFT degradation under gate pulse stress using the slicing model

IEEE Electron Device Letters

Volumn 27, Issue 12, 2006, Pages 981-983

  Tai, Ya Hsiang ^a   Huang, Shih Cheh ^a   Chen, Chien Kwen ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

AC stress; Dynamic stress; Poly Si thin film transistors (TFTs); Reliability

Indexed keywords

DEGRADATION; DYNAMICS; ELECTRIC FIELDS; GATES (TRANSISTOR); POLYSILICON; SEMICONDUCTING SILICON; STRESSES; THRESHOLD VOLTAGE;

DYNAMIC STRESS; GATE PULSE STRESS; GATE VOLTAGE SWING; POLY-SILICON THIN-FILM TRANSISTORS (TFTS);

THIN FILM TRANSISTORS;

EID: 33947244303     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2006.886416     Document Type: Article

References (7)

1. Y. H. Tai, C. C. Pai, B. T. Chen, and H. C. Cheng, "A source-follower type analog buffer using poly-Si TFTs with large design windows," IEEE Electron Device Lett., vol. 26, no. 11, pp. 811-813, Nov. 2005.
2. Y. Uraoka, T. Hatayama, T. Fuyuki, T. Kawamura, and Y. Tasuchihashi, "Reliability of low temperature poly-silicon TFTs under inverter operation," IEEE Trans. Electron Devices, vol. 48, no. 10, pp. 2370-2374, Oct. 2001.
3. Y. Uraoka, T. Hatayama, T. Fuyuki, T. Kawamura, and Y. Tasuchihashi, "Reliability of high-frequency operation of low-temperature polysilicon thin film transistors under dynamic stress," Jpn. J. Appl. Phys., vol. 39, no. 12A, pt. 2, pp. L1209-L1212, Dec. 2000.
4. Y. Uraoka, N. Hirai, H. Yano, T. Hatayama, and T. Fuyuki, "Hot carrier analysis in low-temperature poly-Si thin-film transistors using pico-second time-resolved emission microscope," IEEE Electron Device Lett., vol. 24, no. 4, pp. 236-238, Apr. 2003.
5. Y. Toyota, T. Shiba, and M. Ohkura, "A new model for device degradation in low-temperature n-channel polycrystalline silicon TFTs under ac stress," IEEE Trans. Electron Devices, vol. 51, no. 6, pp. 927-933, Jun. 2004.
6. Y. Toyota, T. Shiba, and M. Ohkura, "Effects of the timing of ac stress on device degradation produced by trap states in low-temperature polycrystalline-silicon TFTs," IEEE Trans. Electron Devices, vol. 52, no. 8, pp. 1766-1771, Aug. 2005.
7. Y. Uraoka, N. Hirai, H. Yano, T. Hatayama, and T. Fuyuki, "Hot carrier analysis in low-temperature poly-Si TFTs using picosecond emission microscope," IEEE Trans. Electron Devices, vol. 51, no. 1, pp. 28-35, Jan. 2004.