Design, fabrication, and calibration of a Piezoresistive stress sensor on SOI wafers for electronic packaging applications

IEEE Transactions on Components and Packaging Technologies

Volumn 32, Issue 2, 2009, Pages 513-520

  Tian, Kuo ^a   Wang, Zheyao ^a   Zhang, Min ^a   Liu, Litian ^a  

^a TSINGHUA UNIVERSITY   (China)

Author keywords

High temperature; Piezoresistors; Silicon on insulator (SOI); Stress sensors

Indexed keywords

BOX LAYERS; BURIED OXIDE LAYERS; CALIBRATION ERROR; ELECTRICAL INSULATION; ELECTRONIC PACKAGING; HIGH TEMPERATURE; HIGH TEMPERATURE STRESS; HIGH-TEMPERATURE OPERATION; NON-LINEARITY; P-TYPE; PIEZORESISTIVE COEFFICIENTS; PIEZORESISTIVE STRESS SENSORS; PIEZORESISTOR; PIEZORESISTORS; SENSOR ELEMENTS; SILICON ISLANDS; SILICON ON INSULATOR WAFERS; SILICON-ON-INSULATOR (SOI); SOI WAFERS; STRESS SENSOR; STRESS SENSORS;

CALIBRATION; ELECTRONICS PACKAGING; FABRICATION; INSULATION; MICROSENSORS; SEMICONDUCTING SILICON COMPOUNDS;

SILICON WAFERS;

EID: 68349139520     PISSN: 15213331     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAPT.2008.2006854     Document Type: Article

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