In-situ stress state measurements during chip-on-board assembly

IEEE Transactions on Electronics Packaging Manufacturing

Volumn 22, Issue 1, 1999, Pages 38-52

  Zou, Yida ^b   Suhling, Jeffrey C ^a,b   Wayne Johnson, R ^a,b   Jaeger, Richard C ^a,b   Mian, A K M ^b  

^a IEEE   (United States)

^b AUBURN UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP-ON-BOARD ASSEMBLY;

BONDING; PIEZOELECTRIC TRANSDUCERS; STRESSES;

ELECTRONICS PACKAGING;

EID: 0033352439     PISSN: 1521334X     EISSN: None     Source Type: Journal    
DOI: 10.1109/6104.755088     Document Type: Article

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