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Volumn , Issue , 2003, Pages 291-297
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Characterization of In-Process Substrate Warpage of Underfilled Flip Chip Assembly
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Author keywords
[No Author keywords available]
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Indexed keywords
CRACK INITIATION;
FLIP CHIP DEVICES;
RELIABILITY;
RESIDUAL STRESSES;
SENSORS;
SOLDERING;
ASSEMBLY;
CHARACTERIZATION;
CHIP SCALE PACKAGES;
DELAMINATION;
ELECTRONICS PACKAGING;
FAILURE (MECHANICAL);
INDUSTRIAL ELECTRONICS;
LEAD;
MANUFACTURE;
SILICON;
SUBSTRATES;
TESTING;
VEHICLES;
FLIP CHIP ASSEMBLY;
ELECTRONICS PACKAGING;
FLIP CHIP DEVICES;
EXPERIMENTAL APPROACHES;
FLIP CHIP;
FLIP CHIP ASSEMBLIES;
FLIP CHIP ON BOARDS;
PIEZORESISTANCE;
PIEZORESISTIVE STRESS SENSORS;
SHADOW MOIRE SYSTEM;
UNDERFILL MATERIALS;
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EID: 0141565355
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (8)
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References (7)
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