Fault-tolerant router with built-in self-test/self-diagnosis and fault-isolation circuits for 2d-mesh based chip multiprocessor systems

International Journal of Electrical Engineering

Volumn 16, Issue 3, 2009, Pages 213-222

  Lin, Shu Yen ^a   Shen, Wen Chung ^a   Hsu, Chan Cheng ^a   Andy, An Yeu ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

Built in self diagnosis; Chip multiprocessor; On chip networks; Router architecture

Indexed keywords

BUILT-IN SELF-DIAGNOSIS; CHIP MULTIPROCESSOR; FAULT-TOLERANT; ON-CHIP NETWORKS; ROUTER ARCHITECTURE; ROUTER DESIGN; SELF-DIAGNOSIS;

BUILT-IN SELF TEST; COMPUTER ARCHITECTURE; ELECTRIC NETWORK TOPOLOGY; MULTIPROCESSING SYSTEMS; NETWORK ARCHITECTURE; SYSTEMS ANALYSIS;

ROUTERS;

EID: 67650502771     PISSN: 18123031     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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