Fault-tolerant routing schemes in RDT(2,2,1)/α-based interconnection network for networks-on-chip designs

Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN

Volumn 2005, Issue , 2005, Pages 52-57

  Yang, Mei ^a   Li, Tao ^b   Jiang, Yingtao ^a   Yang, Yulu ^b  

^a University of Nevada Las Vegas   (United States)

^b NANKAI UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SYSTEM RECOVERY; INTERCONNECTION NETWORKS; LOGIC DESIGN; MICROPROCESSOR CHIPS; PROGRAM PROCESSORS;

FAULT TOLERANT ROUTING SCHEMES; INTERMEDIATE NODES; NODE FAILURES;

FAULT TOLERANT COMPUTER SYSTEMS;

EID: 33846945395     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISPAN.2005.49     Document Type: Conference Paper

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