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Volumn 30, Issue 7, 2009, Pages 760-762

A study of strain engineering using CESL stressor on reliability comparing effect of intrinsic mechanical stress

Author keywords

Contact etch stop layer (CESL); Mechanical stress; Metal gate high ; Strained device

Indexed keywords

BENDING STRESS; CONTACT ETCH STOP LAYER (CESL); DEVICE CHARACTERISTICS; DEVICE PERFORMANCE; HYDROGEN PASSIVATION; INTERFACE QUALITY; MECHANICAL STRESS; NITRIDE LAYERS; RELIABILITY CHARACTERISTICS; STRAIN ENGINEERING; STRAINED DEVICE;

EID: 67650443968     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2009.2021007     Document Type: Article
Times cited : (15)

References (15)
  • 1
    • 14844325767 scopus 로고    scopus 로고
    • CMOS integration issues with high-k gate stack
    • D.-L. Kwong, "CMOS integration issues with high-k gate stack," in Proc. 11th IPFA, 2004, pp. 17-20.
    • (2004) Proc. 11th IPFA , pp. 17-20
    • Kwong, D.-L.1
  • 6
    • 41749118706 scopus 로고    scopus 로고
    • PBTI associated high-temperature hot carrier degradation of nMOSFETs with metal-gate/high-k dielectrics
    • Apr
    • K. T. Lee, C. Y. Kang, O. S. Yoo, R. Choi, B. H. Lee, J. C. Lee, H. D. Lee, and Y. H. Jeong, "PBTI associated high-temperature hot carrier degradation of nMOSFETs with metal-gate/high-k dielectrics," IEEE Electron Device Lett., vol. 29, no. 4, pp. 389-391, Apr. 2008.
    • (2008) IEEE Electron Device Lett , vol.29 , Issue.4 , pp. 389-391
    • Lee, K.T.1    Kang, C.Y.2    Yoo, O.S.3    Choi, R.4    Lee, B.H.5    Lee, J.C.6    Lee, H.D.7    Jeong, Y.H.8
  • 8
    • 34147124087 scopus 로고    scopus 로고
    • Method for managing the stress due to the strained nitride capping layer in MOS transistors
    • Apr
    • S. Orain, V. Fiori, D. Villanueva, A. Dray, and C. Ortolland, "Method for managing the stress due to the strained nitride capping layer in MOS transistors," IEEE Trans. Electron Devices, vol. 54, no. 4, pp. 814-821, Apr. 2007.
    • (2007) IEEE Trans. Electron Devices , vol.54 , Issue.4 , pp. 814-821
    • Orain, S.1    Fiori, V.2    Villanueva, D.3    Dray, A.4    Ortolland, C.5
  • 9
    • 34249885074 scopus 로고    scopus 로고
    • Scalability of stress induced by contact-etch-stop layers: A simulation study
    • Jun
    • G. Eneman, P. Verheyen, A. D. Keersgieter, M. Jurczak, and K. D. Meyer, "Scalability of stress induced by contact-etch-stop layers: A simulation study," IEEE Trans. Electron Devices, vol. 54, no. 6, pp. 1446-1453, Jun. 2007.
    • (2007) IEEE Trans. Electron Devices , vol.54 , Issue.6 , pp. 1446-1453
    • Eneman, G.1    Verheyen, P.2    Keersgieter, A.D.3    Jurczak, M.4    Meyer, K.D.5
  • 10
    • 41149095123 scopus 로고    scopus 로고
    • M. Shima, K. Okabe, A. Yamaguchi, K. Kawamura, S. Pidin, M. Okuno, T. Owada, K. Sugimoto, J. Ogura, H. Kokura, H. Morioka, T. Watanabe, T. Isome, K. Okoshi, T. Mori, Y. Hayami, H. Minakata, A. Hatada, Y. Shimamune, A. Katakami, H. Ota, T. Sakuma, T. Miyashita, K. Hosaka, H. Fukutome, N. Tamura, T. Aoyama, K. Sukegawa, M. Nakaishi, S. Fukuyama, S. Nakai, M. Kojima, S. Sato, M. Miyajima, K. Hashimoto, and T. Sugii, High-performance low operation power transistor for 45 nm node universal applications, in VLSI Symp. Tech. Dig., 2006, pp. 156-157.
    • M. Shima, K. Okabe, A. Yamaguchi, K. Kawamura, S. Pidin, M. Okuno, T. Owada, K. Sugimoto, J. Ogura, H. Kokura, H. Morioka, T. Watanabe, T. Isome, K. Okoshi, T. Mori, Y. Hayami, H. Minakata, A. Hatada, Y. Shimamune, A. Katakami, H. Ota, T. Sakuma, T. Miyashita, K. Hosaka, H. Fukutome, N. Tamura, T. Aoyama, K. Sukegawa, M. Nakaishi, S. Fukuyama, S. Nakai, M. Kojima, S. Sato, M. Miyajima, K. Hashimoto, and T. Sugii, "High-performance low operation power transistor for 45 nm node universal applications," in VLSI Symp. Tech. Dig., 2006, pp. 156-157.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.