-
1
-
-
8344228535
-
A 1-V 140-μW 88-dB audio sigma-delta modulator in 90-nm CMOS
-
Nov
-
L. Yao, M. S. J. Steyaert, and W. Sansen, "A 1-V 140-μW 88-dB audio sigma-delta modulator in 90-nm CMOS," IEEE J. Solid-State Circuits, vol. 39, no. 11, pp. 1809-1818, Nov. 2004.
-
(2004)
IEEE J. Solid-State Circuits
, vol.39
, Issue.11
, pp. 1809-1818
-
-
Yao, L.1
Steyaert, M.S.J.2
Sansen, W.3
-
2
-
-
33847745487
-
A 0.9-V AE modulator with 80 dB SNDR and 83 dB DR using a single-phase technique
-
Feb
-
J. Goes, B. Vaz, R. Monteiro, and N. Paulino, "A 0.9-V AE modulator with 80 dB SNDR and 83 dB DR using a single-phase technique," in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2006, pp. 74-75.
-
(2006)
IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers
, pp. 74-75
-
-
Goes, J.1
Vaz, B.2
Monteiro, R.3
Paulino, N.4
-
3
-
-
33947653265
-
A 1-V 100-MS/s 8-bit CMOS switched-opamp pipelined ADC using loading-free architecture
-
Apr
-
P. Y. Wu, V. S. -L. Cheung, and H. C. Luong, "A 1-V 100-MS/s 8-bit CMOS switched-opamp pipelined ADC using loading-free architecture," IEEE J. Solid-State. Ciicuits, vol. 42, no. 4, pp. 730-738, Apr. 2007.
-
(2007)
IEEE J. Solid-State. Ciicuits
, vol.42
, Issue.4
, pp. 730-738
-
-
Wu, P.Y.1
Cheung, V.S.-L.2
Luong, H.C.3
-
4
-
-
33847705801
-
A 0.5-V 74-dB SNDR 25 kHz CT AE modulator with return-to-open. DAC
-
Feb
-
K.-P. Pun, S. Chatterjee, and P. Kinget, "A 0.5-V 74-dB SNDR 25 kHz CT AE modulator with return-to-open. DAC," in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2006, pp. 72-73.
-
(2006)
IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers
, pp. 72-73
-
-
Pun, K.-P.1
Chatterjee, S.2
Kinget, P.3
-
5
-
-
0348233280
-
A 12-bit 75-MS/s pipelined ADC using open-loop residue amplification
-
Dec
-
B. Murmann and B. Boser, "A 12-bit 75-MS/s pipelined ADC using open-loop residue amplification," IEEE J. Solid-State Circuits, vol. 38, no. 12, pp. 2040-2050, Dec. 2003.
-
(2003)
IEEE J. Solid-State Circuits
, vol.38
, Issue.12
, pp. 2040-2050
-
-
Murmann, B.1
Boser, B.2
-
6
-
-
10444270157
-
A digitally enhanced 1.8-V 15-bit 40-MSample/s CMOS pipelined ADC
-
Dec
-
E. Siragusa and I. Galton, "A digitally enhanced 1.8-V 15-bit 40-MSample/s CMOS pipelined ADC," IEEE J. Solid-State. Circuits, vol. 39, no. 12, pp. 2126-2138, Dec. 2004.
-
(2004)
IEEE J. Solid-State. Circuits
, vol.39
, Issue.12
, pp. 2126-2138
-
-
Siragusa, E.1
Galton, I.2
-
7
-
-
0346261226
-
Low voltage analog circuit design techniques
-
May
-
S.S. Rajput and S.S. Jamuar, "Low voltage analog circuit design techniques," IEEE Circuits Syst. Mag., vol. 2, no. 1, pp. 24-42, May 2002.
-
(2002)
IEEE Circuits Syst. Mag
, vol.2
, Issue.1
, pp. 24-42
-
-
Rajput, S.S.1
Jamuar, S.S.2
-
8
-
-
33845613087
-
-
J. K. Fiorenza, T. Sepke, P. Holloway, C. G. Sodini, and H.-S. Lee, Comparator-based switched-capacitor circuits dor scaled CMOS technologies, IEEE J. Solid-State Circuits, 4.1, no. 12, pp. 2658-2668, Dec. 2006.
-
J. K. Fiorenza, T. Sepke, P. Holloway, C. G. Sodini, and H.-S. Lee, "Comparator-based switched-capacitor circuits dor scaled CMOS technologies," IEEE J. Solid-State Circuits, vol. 4.1, no. 12, pp. 2658-2668, Dec. 2006.
-
-
-
-
9
-
-
23744476511
-
A time-based energy-efficient analog-to-digital converter
-
Aug
-
H. Yang and R. Sarpeshkar, "A time-based energy-efficient analog-to-digital converter," IEEE J. Solid-State Circuits, vol. 40, no. 8, pp. 1590-1601, Aug. 2005.
-
(2005)
IEEE J. Solid-State Circuits
, vol.40
, Issue.8
, pp. 1590-1601
-
-
Yang, H.1
Sarpeshkar, R.2
-
10
-
-
0033280241
-
A Nyquist-rate pipelined oversampling A/D converter
-
Dec
-
S. Paul, H.-S. Lee, J. Goodrich, T. Alailima, and D. Santiago, "A Nyquist-rate pipelined oversampling A/D converter," IEEE J. Solid-State. Circuits, vol. 34, no. 12, pp. 1777-1787, Dec. 1999.
-
(1999)
IEEE J. Solid-State. Circuits
, vol.34
, Issue.12
, pp. 1777-1787
-
-
Paul, S.1
Lee, H.-S.2
Goodrich, J.3
Alailima, T.4
Santiago, D.5
-
11
-
-
0018727884
-
Dynamic CMOS amplifiers
-
Dec
-
B. J. Hosticka, "Dynamic CMOS amplifiers," IEEE J. Solid-State Circuits, vol. 14, pp. 1111-1114, Dec. 1979.
-
(1979)
IEEE J. Solid-State Circuits
, vol.14
, pp. 1111-1114
-
-
Hosticka, B.J.1
-
12
-
-
0020156838
-
Micropower switched capacitor biquadratic cell
-
June
-
F. Krummenacher, "Micropower switched capacitor biquadratic cell," IEEE J. Solid-State Circuits, vol. 17, pp. 507-512, June 1982.
-
(1982)
IEEE J. Solid-State Circuits
, vol.17
, pp. 507-512
-
-
Krummenacher, F.1
-
13
-
-
0026819968
-
A CMOS transconductance-C filter technique for very high, frequencies
-
Feb
-
B. Nauta, "A CMOS transconductance-C filter technique for very high, frequencies," IEEE J. Solid-State Circuits, vol. 27, pp. 142-153, Feb. 1992.
-
(1992)
IEEE J. Solid-State Circuits
, vol.27
, pp. 142-153
-
-
Nauta, B.1
-
14
-
-
24144454671
-
Sub-μ W switched-capacitor circuits using class-C inverter
-
May
-
M. Kwon, Y. Chae, and G. Han, "Sub-μ W switched-capacitor circuits using class-C inverter," IEICE Trans. Fundamentals, vol. E88-A, no. 5, pp. 1313-1319, May 2005.
-
(2005)
IEICE Trans. Fundamentals
, vol.E88-A
, Issue.5
, pp. 1313-1319
-
-
Kwon, M.1
Chae, Y.2
Han, G.3
-
15
-
-
49549119985
-
An inverterbased hybrid ΣΔ modulator
-
Feb
-
R. H. M. van Veldhoven, R. Rutten, and L. J. Breems, "An inverterbased hybrid ΣΔ modulator," in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2008, pp. 492-493.
-
(2008)
IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers
, pp. 492-493
-
-
van Veldhoven, R.H.M.1
Rutten, R.2
Breems, L.J.3
-
16
-
-
39749188890
-
A low power sigma-delta modulator using class-C inverter
-
Jun
-
Y. Chae and G. Han, "A low power sigma-delta modulator using class-C inverter," in Symp. VLSI Circuits Dig., Jun. 2007, pp. 240-241.
-
(2007)
Symp. VLSI Circuits Dig
, pp. 240-241
-
-
Chae, Y.1
Han, G.2
-
17
-
-
49549093422
-
A 0.7-V 36-μW 85 dB-DR audio ΣΔ modulator using class-C inverter
-
Feb
-
Y. Chae, I. Lee, and G. Han, "A 0.7-V 36-μW 85 dB-DR audio ΣΔ modulator using class-C inverter," in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2008, pp. 490-491.
-
(2008)
IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers
, pp. 490-491
-
-
Chae, Y.1
Lee, I.2
Han, G.3
-
18
-
-
0033685673
-
Efficient common-mode feedback circuits for pseudo-differential switched-capacitor stages
-
May
-
L. Wu, M. Keskin, U. Moon, and G. Temes, "Efficient common-mode feedback circuits for pseudo-differential switched-capacitor stages," in Proc. IEEE Int. Symp. Circuits and Systems, May 2000, vol. V, pp. 445-448.
-
(2000)
Proc. IEEE Int. Symp. Circuits and Systems
, vol.5
, pp. 445-448
-
-
Wu, L.1
Keskin, M.2
Moon, U.3
Temes, G.4
-
19
-
-
0037319649
-
A 10-b 30-MS/s low-power pipelined CMOS A/D converter using a pseudodifferential architecture
-
Feb
-
D. Miyazaki, S. Kawahito, and M. Furata, "A 10-b 30-MS/s low-power pipelined CMOS A/D converter using a pseudodifferential architecture," IEEE J. Solid-State Circuits, vol. 38, pp. 369-373, Feb. 2003.
-
(2003)
IEEE J. Solid-State Circuits
, vol.38
, pp. 369-373
-
-
Miyazaki, D.1
Kawahito, S.2
Furata, M.3
-
21
-
-
0028547602
-
Analytical and experimental studies of thermal noise in MOSFETs
-
Nov
-
S. Tedja, J. Van der Spiegel, and H. H. Williams, "Analytical and experimental studies of thermal noise in MOSFETs," IEEE Trans. Election Devices, vol. 41, pp. 2069-2075, Nov. 1994.
-
(1994)
IEEE Trans. Election Devices
, vol.41
, pp. 2069-2075
-
-
Tedja, S.1
Van der Spiegel, J.2
Williams, H.H.3
-
22
-
-
0030286542
-
Circuit techniques for reducing the effects of op-amp imperfections: Autozeroing, correlated double sampling, and chopper stabilization
-
Nov
-
C. C. Enz and G. C. Temes, "Circuit techniques for reducing the effects of op-amp imperfections: Autozeroing, correlated double sampling, and chopper stabilization," in Proc. IEEE, Nov. 1996, vol. 84, pp. 584-1614.
-
(1996)
Proc. IEEE
, vol.84
, pp. 584-1614
-
-
Enz, C.C.1
Temes, G.C.2
-
23
-
-
0019606269
-
Effects of the op amp finite gain and bandwidth on the performance of switched-capacitor filters
-
Aug
-
K. Martin and A. S. Sedra, "Effects of the op amp finite gain and bandwidth on the performance of switched-capacitor filters," IEEE Trans. Circuits Syst., vol. CAS-28, no. 8, pp. 822-829, Aug. 1981.
-
(1981)
IEEE Trans. Circuits Syst
, vol.CAS-28
, Issue.8
, pp. 822-829
-
-
Martin, K.1
Sedra, A.S.2
-
25
-
-
0003573558
-
-
New York: IEEE Press
-
S. Norsworthy, R. Schreier, and G. Temes, Delta-Sigma Data Converters: Theory, Design, and Simulation. New York: IEEE Press, 1996.
-
(1996)
Delta-Sigma Data Converters: Theory, Design, and Simulation
-
-
Norsworthy, S.1
Schreier, R.2
Temes, G.3
-
26
-
-
0031192291
-
A 1.5-V 100-μW ΔΣ modulator with 12-b dynamic range using the switched-opamp technique
-
Jul
-
V. Peluso, M. S. J. Steyaert, and W. Sansen, "A 1.5-V 100-μW ΔΣ modulator with 12-b dynamic range using the switched-opamp technique," IEEE J. Solid-State Circuits, vol. 32, pp. 943-951, Jul. 1997.
-
(1997)
IEEE J. Solid-State Circuits
, vol.32
, pp. 943-951
-
-
Peluso, V.1
Steyaert, M.S.J.2
Sansen, W.3
-
27
-
-
10444220925
-
A very low-power CMOS mixed-signal IC for implantable pacemaker applications
-
Dec
-
L. S. Y. Wong, S. Hossain, A. Ta, J. Edvinsson, D. H. Rivas, and H. Naas, "A very low-power CMOS mixed-signal IC for implantable pacemaker applications," IEEE J. Solid-State Circuits, vol. 39, no. 12, pp. 2446-2456, Dec. 2004.
-
(2004)
IEEE J. Solid-State Circuits
, vol.39
, Issue.12
, pp. 2446-2456
-
-
Wong, L.S.Y.1
Hossain, S.2
Ta, A.3
Edvinsson, J.4
Rivas, D.H.5
Naas, H.6
-
28
-
-
0032317771
-
A 900-mW low-power ΔΣ A/D converter with 77-dB dynamic range
-
Dec
-
V. Peluso, P. Vancorenland, A. Marques, M. Steyaert, and W. Sansen, "A 900-mW low-power ΔΣ A/D converter with 77-dB dynamic range." IEEE J. Solid-State Circuits, vol. 33. pp. 1887-1897, Dec. 1998.
-
(1998)
IEEE J. Solid-State Circuits
, vol.33
, pp. 1887-1897
-
-
Peluso, V.1
Vancorenland, P.2
Marques, A.3
Steyaert, M.4
Sansen, W.5
-
29
-
-
0029269932
-
A 10 b, 20 Msample/s, 35 mW pipeline A/D converter
-
Mar
-
T. B. Cho and P. R. Gray, "A 10 b, 20 Msample/s, 35 mW pipeline A/D converter," IEEE J. Solid-State Circuits, vol. 30, pp. 166-172, Mar. 1995.
-
(1995)
IEEE J. Solid-State Circuits
, vol.30
, pp. 166-172
-
-
Cho, T.B.1
Gray, P.R.2
-
30
-
-
33845602549
-
A 1/1.8-inch 6.4 Mpixel 60 frames/s CMOS image sensor with, seamless mode change
-
Dec
-
S. Yoshihara et al., "A 1/1.8-inch 6.4 Mpixel 60 frames/s CMOS image sensor with, seamless mode change," IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2998-3006, Dec. 2006.
-
(2006)
IEEE J. Solid-State Circuits
, vol.41
, Issue.12
, pp. 2998-3006
-
-
Yoshihara, S.1
-
31
-
-
66549085580
-
An active pixel sensor fabricated using CMOS/CCD process technology
-
Dana Point, CA
-
P. Lee, R. Gee, M. Guidash, T. Lee, and E. R. Fossum, "An active pixel sensor fabricated using CMOS/CCD process technology," in IEEE Workshop on CCDs and Advanced Image Sensors, Dana Point, CA, 20-22, 1995.
-
(1995)
IEEE Workshop on CCDs and Advanced Image Sensors
, pp. 20-22
-
-
Lee, P.1
Gee, R.2
Guidash, M.3
Lee, T.4
Fossum, E.R.5
-
32
-
-
25144499991
-
A low-voltage lowpower sigma-delta modulator for broadband analog-to-digital conversion
-
Sept
-
K. Nam, S.-M. Lee, D. K. Su, and B. Wooley, "A low-voltage lowpower sigma-delta modulator for broadband analog-to-digital conversion," IEEE J. Solid-State Circuits, vol. 40, no. 9, pp. 1855-1864, Sept. 2005.
-
(2005)
IEEE J. Solid-State Circuits
, vol.40
, Issue.9
, pp. 1855-1864
-
-
Nam, K.1
Lee, S.-M.2
Su, D.K.3
Wooley, B.4
-
34
-
-
0031372332
-
Low-voltage double-sampled ΣΔ converters
-
Dec
-
D. Sentaowicz, G. Nicollini, S. Pernici, A. Nagari, P. Confalonieri, and C. Dallavale, "Low-voltage double-sampled ΣΔ converters," IEEE J. Solid-State Circuits, vol. 32, pp. 1907-1919, Dec. 1997.
-
(1997)
IEEE J. Solid-State Circuits
, vol.32
, pp. 1907-1919
-
-
Sentaowicz, D.1
Nicollini, G.2
Pernici, S.3
Nagari, A.4
Confalonieri, P.5
Dallavale, C.6
-
35
-
-
0031169153
-
A 1.8-V digital-audio ΣΔ modulator in 0.8-μm CMOS
-
June
-
S. Rabii and B. A. Wooley, "A 1.8-V digital-audio ΣΔ modulator in 0.8-μm CMOS," IEEE J. Solid-State Circuits, vol. 32, pp. 783-796, June 1997.
-
(1997)
IEEE J. Solid-State Circuits
, vol.32
, pp. 783-796
-
-
Rabii, S.1
Wooley, B.A.2
-
36
-
-
0031071955
-
A 5-V, 118-dB delta-sigma analog to digital converter for wideband digital audio
-
Feb
-
K. Y. Leung, E. J. Swanson, K. Leung, and S. S. Zhu, "A 5-V, 118-dB delta-sigma analog to digital converter for wideband digital audio," in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 1997, pp. 218-219.
-
(1997)
IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers
, pp. 218-219
-
-
Leung, K.Y.1
Swanson, E.J.2
Leung, K.3
Zhu, S.S.4
-
39
-
-
0035273851
-
Very low-voltage digital-audio A E modulator with 88-dB dynamic range using local switch boothstrapping
-
Mar
-
M. Dessouky and A. Kaiser, "Very low-voltage digital-audio A E modulator with 88-dB dynamic range using local switch boothstrapping," IEEE J. Solid-State Circuits, vol. 36, pp. 349-355, Mar. 2001.
-
(2001)
IEEE J. Solid-State Circuits
, vol.36
, pp. 349-355
-
-
Dessouky, M.1
Kaiser, A.2
-
40
-
-
0036641068
-
A 1-V 10-MHz clock-rate 13-bit CMOS ΔΣ modulator using unity-gain-reset opamps
-
July
-
M. Keskin, U. Moon, and G. C. Temes, "A 1-V 10-MHz clock-rate 13-bit CMOS ΔΣ modulator using unity-gain-reset opamps," IEEE J. Solid-State Circuits, vol. 38, pp. 817-824, July 2002.
-
(2002)
IEEE J. Solid-State Circuits
, vol.38
, pp. 817-824
-
-
Keskin, M.1
Moon, U.2
Temes, G.C.3
-
41
-
-
0036914179
-
A 0.7-V MOSFET-only switched-opamp ΔΣ modulator in standard digital CMOS technology
-
Dec
-
J. Sauerbrey, T. Tille, D. Schmitt-Landsiedel, and R. Thewes, "A 0.7-V MOSFET-only switched-opamp ΔΣ modulator in standard digital CMOS technology," IEEE J. Solid-State. Circuits, vol. 37, pp. 1662-1669, Dec. 2002.
-
(2002)
IEEE J. Solid-State. Circuits
, vol.37
, pp. 1662-1669
-
-
Sauerbrey, J.1
Tille, T.2
Schmitt-Landsiedel, D.3
Thewes, R.4
-
42
-
-
0042697093
-
A 1.5-V 12-bit power efficient continuous-time third-order ΔΣ modulator
-
Aug
-
F. Gerfers, M. Ortmannz, and Y. Manoli, "A 1.5-V 12-bit power efficient continuous-time third-order ΔΣ modulator," IEEE J. Solid-State Circuits, vol. 38, no. 8, pp. 1343-1352, Aug. 2003.
-
(2003)
IEEE J. Solid-State Circuits
, vol.38
, Issue.8
, pp. 1343-1352
-
-
Gerfers, F.1
Ortmannz, M.2
Manoli, Y.3
-
43
-
-
0037630709
-
A 0.9-V 0.5-μW CMOS single switched op-amp signal-conditioning system for pacemaker applications
-
Feb
-
V. S. L. Cheung and H. C. Luong, "A 0.9-V 0.5-μW CMOS single switched op-amp signal-conditioning system for pacemaker applications," in IEEE Int. Solid-State Circuits Conf.. Dig. Tech. Papers, Feb. 2003, pp. 408-503.
-
(2003)
IEEE Int. Solid-State Circuits Conf.. Dig. Tech. Papers
, pp. 408-503
-
-
Cheung, V.S.L.1
Luong, H.C.2
-
44
-
-
0346972312
-
2
-
Dec
-
2," IEEE J. Solid-State Circuits, vol. 38, pp. 2061-2068, Dec. 2003.
-
(2003)
IEEE J. Solid-State Circuits
, vol.38
, pp. 2061-2068
-
-
Yang, Y.-Q.1
Chokhawala, A.2
Alexander, M.3
Melanson, J.4
Hester, D.5
-
45
-
-
3042701344
-
A fully integrated two-channel A/D interface for the acquisition of cardiac signals in implantable pacemakers
-
July
-
A. Gerosa, A. Maniero, and A. Neviani, "A fully integrated two-channel A/D interface for the acquisition of cardiac signals in implantable pacemakers," IEEE J. Solid-State Circuits, vol. 39, no. 7, pp. 1083-1093, July 2004.
-
(2004)
IEEE J. Solid-State Circuits
, vol.39
, Issue.7
, pp. 1083-1093
-
-
Gerosa, A.1
Maniero, A.2
Neviani, A.3
-
46
-
-
29044447507
-
A106-dB SNR hybrid oversampling analog-to-digital converter for digital audio
-
Dec
-
K. Nguyen, R. Adams, K. Sweetland, and H. Chen, "A106-dB SNR hybrid oversampling analog-to-digital converter for digital audio," IEEE J. Solid-State Circuits, vol. 40, no. 12, pp. 2408-2415, Dec. 2005.
-
(2005)
IEEE J. Solid-State Circuits
, vol.40
, Issue.12
, pp. 2408-2415
-
-
Nguyen, K.1
Adams, R.2
Sweetland, K.3
Chen, H.4
-
47
-
-
29044444622
-
A 0.6-V 82-dB delta-sigma audio ADC using switched-RC integrators
-
Dec
-
G.-C. Ahn, D.-Y. Chang, M. E. Brown, N. Ozaki, H. Youra, K. Yamamura, K. Hamashita, K. Takasuka, G. C. Temes, and U.-K. Moon, "A 0.6-V 82-dB delta-sigma audio ADC using switched-RC integrators," IEEE J. Solid-State Circuits, vol. 40, no. 12, pp. 2398-2407, Dec. 2005.
-
(2005)
IEEE J. Solid-State Circuits
, vol.40
, Issue.12
, pp. 2398-2407
-
-
Ahn, G.-C.1
Chang, D.-Y.2
Brown, M.E.3
Ozaki, N.4
Youra, H.5
Yamamura, K.6
Hamashita, K.7
Takasuka, K.8
Temes, G.C.9
Moon, U.-K.10
-
48
-
-
33645673620
-
An energy efficient analog front-end circuit for a sub-1-V digital hearing aid chip
-
Apr
-
S. Kim, J.-Y. Lee, S.-J. Song, N. Cho, and H.-J. Yoo, "An energy efficient analog front-end circuit for a sub-1-V digital hearing aid chip," IEEE J. Solid-State Circuits, vol. 41, no. 4, pp. 1081-1091, Apr. 2006.
-
(2006)
IEEE J. Solid-State Circuits
, vol.41
, Issue.4
, pp. 1081-1091
-
-
Kim, S.1
Lee, J.-Y.2
Song, S.-J.3
Cho, N.4
Yoo, H.-J.5
-
49
-
-
42649126695
-
A 0.9-V 92-dB double-sampled switched-RC delta-sigma audio ADC
-
May
-
M. G. Kim, G.-C. Ahn, P. K. Hanumolu, S.-H. Lee, S.-H. Kim, S.-B. You, J.-W. Kim, G. C. Temes, and U.-K. Moon, "A 0.9-V 92-dB double-sampled switched-RC delta-sigma audio ADC," IEEE J. Solid-State Circuits, vol. 43, no. 5, pp. 1195-1206, May 2008.
-
(2008)
IEEE J. Solid-State Circuits
, vol.43
, Issue.5
, pp. 1195-1206
-
-
Kim, M.G.1
Ahn, G.-C.2
Hanumolu, P.K.3
Lee, S.-H.4
Kim, S.-H.5
You, S.-B.6
Kim, J.-W.7
Temes, G.C.8
Moon, U.-K.9
-
50
-
-
38849162117
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A 0.9-V 60-μW 1-bit fourth-order delta-sigma modulator with 83-dB dynamic range
-
Feb
-
J. Roh, S. Byun, Y. Choi, H. Roh, Y.-G. Kim, and J.-K. Kee, "A 0.9-V 60-μW 1-bit fourth-order delta-sigma modulator with 83-dB dynamic range," IEEE J. Solid-State Circuits, vol. 43, no. 2, pp. 361-370, Feb. 2008.
-
(2008)
IEEE J. Solid-State Circuits
, vol.43
, Issue.2
, pp. 361-370
-
-
Roh, J.1
Byun, S.2
Choi, Y.3
Roh, H.4
Kim, Y.-G.5
Kee, J.-K.6
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