A 0.9-V 60-μW 1-bit fourth-order delta-sigma modulator with 83-dB dynamic range

IEEE Journal of Solid-State Circuits

Volumn 43, Issue 2, 2008, Pages 361-370

  Roh, Jeongjin ^a,b   Byun, Sanho ^c   Choi, Youngkil ^a,b   Roh, Hyungdong ^a,b   Kim, Yi Gyeong ^d   Kwon, Jong Kee ^d  

^a IEEE

^b Hanyang University   (South Korea)

^c SAMSUNG Electronics   (South Korea)

^d Electronics and Telecommunications Research Institute (ETRI)   (South Korea)

Author keywords

Low power; Low voltage; Operational transconductance amplifier; Sigma delta modulation; Switched capacitator circuits

Indexed keywords

BANDWIDTH; CMOS INTEGRATED CIRCUITS; ELECTRIC POTENTIAL; FEEDBACK; POWER AMPLIFIERS; SIGNAL PROCESSING;

DYNAMIC RANGE; MODULATOR ARCHITECTURE; SIGNAL BANDWIDTH;

MODULATORS;

EID: 38849162117     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2007.914266     Document Type: Article

References (21)

1. J. C. Candy and G. C. Temes, Oversampling Delta-Sigma Data Converters: Theory, Design and Simulation. Piscataway, NJ: IEEE Press, 1992.
2. V. Peluso, P. Vancorenland, A. M. Marques, M. S. J. Steyaert, and W. Sansen, "A 900-mV low-power Δσ A/D converter with 77-dB dynamic range," IEEE J. Solid-State Circuits, vol. 33, no. 12, pp. 1887-1897, Dec. 1998.
3. J. Sauerbrey, T. Tille, D. Schmitt-Landsiedel, and R. Thewes, "A 0.7-V MOSFET-only switched-opamp Δσ modulator in standard digital CMOS technology," IEEE J. Solid-State Circuits, vol. 37, no. 12, pp. 1662-1669, Dec. 2002.
4. G.-C. Ahn, D.-Y. Chang, M. E. Brown, N. Ozaki, H. Youra, K. Yamamura, K. Hamashita, K. Takasuka, G. C. Temes, and U. Moon, "A 0.6-V 82-dB delta-sigma audio ADC using switched-RC integrators," IEEE J. Solid-State Circuits, vol. 40, no. 12, pp. 2398-2407, Dec. 2005.
5. J. Goes, B. Vaz, R. Monteiro, and N. Paulino, "A 0.9 V Δσ modulator with 80 dB SNDR and 83 dB DR using a single-phase technique," in IEEE ISSCC Dig. Tech. Papers, 2006, pp. 74-75.
6. K.-P. Pun, S. Chatterjee, and P. R. Kinget, "A 0.5-V 74-dB SNDR 25-kHz continuous-time delta-sigma modulator with a return-to-open DAC," IEEE J. Solid-State Circuits, vol. 42, no. 3, pp. 496-507, Mar. 2007.
7. M. Dessouky and A. Kaiser, "Very low-voltage digital-audio AE modulator with 88-dB dynamic range using local switch bootstrapping," IEEE J. Solid-State Circuits, vol. 36, no. 3, pp. 349-355, Mar. 2001.
8. S. S. Bazarjani, M. Snelgrove, and T. MacElwee, "A 1 V switched-capacitor σΔ modulator," in Proc. IEEE Symp. Low Power Electronics, Oct. 1995, pp. 70-71.
9. L. Yao, M. Steyaert, and W. Sansen, "A 1-V 140- μW 88-dB audio sigma-delta modulator in 90-nm CMOS," IEEE J. Solid-State Circuits, vol. 39, no. 11, pp. 1809-1818, Nov. 2004.
10. J. Silva, U. Moon, J. Steensgaard, and G. C. Temes, "Wideband low-distortion delta-sigma ADC topology," IEE Electron. Lett., vol. 37, no. 6, pp. 737-738, Jun. 2001.
11. 2," IEEE J. Solid-State Circuits, vol. 38, no. 12, pp. 2061-2068, Dec. 2003.
12. A. Gharbiya and D. A. Johns, "On the implementation of input-feed-forward delta-sigma modulators," IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 53, no. 6, pp. 453-457, Jun. 2006.
13. S. Rabii and B. A. Wooley, The Design of Low-Voltage, Low-Power Sigma-Delta Modulators. Norwell, MA: KAP, 1999.
14. R. Schreier and G. C. Temes, Understanding Delta-Sigma Data Converters. Piscataway, NJ: IEEE Press, 2005.
15. K. B. Ohri and M. J. Callahan, Jr, "Integrated PCM codec," IEEE J. Solid-State Circuits, vol. SC-14, no. 1, pp. 38-46, Feb. 1979.
16. R. Gregorian, Introduction to CMOS Op-Amps and Comparators. New York: Wiley, 1999.
17. J. Adut, J. Silva-Martinez, and M. Rocha-Perez, "A 10.7-MHz sixth-order SC ladder filter in 0.35-μm CMOS technology," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 53, pp. 1625-1635, Aug. 2006.
18. K. Roy, S. Mukhopadhyay, and H. Mahmoodi-Meimand, "Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits," Proc. IEEE, vol. 91, no. 2, pp. 305-327, Feb. 2003.
19. TII transistors by analog T-switch (AT-switch) and super cut-off CMOS (SCCMOS)," IEEE J. Solid-State Circuits, vol. 41, no. 4, pp. 859-867, Apr. 2006.
20. P. Malcovati, S. Brigati, F. Francesconi, F. Maloberti, and A. Baschirotto, "Behavioral modeling of switched-capacitor sigma-delta modulators," IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 50, pp. 352-364, Mar. 2003.
21. D. Senderowicz, S. F. Dreyer, J. H. Huggins, C. F. Rahim, and C. A. Laber, "A family of differential nMOS analog circuits for a PCM codec filter chip," IEEE J. Solid-State Circuits, vol. SC-17, no. 6, pp. 1982-1023, Dec. 1982.