A 0.9V ΔΣ modulator with 80dB SNDR and 83dB DR using a single-phase technique

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2006, Pages

  Goes, João ^a   Vaz, Bruno ^b   Monteiro, Rui ^b   Paulino, Nuno ^a  

^a UNIVERSIDADE NOVA DE LISBOA   (Portugal)

^b Acacia Semiconductor   (Portugal)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); CMOS INTEGRATED CIRCUITS;

SINGLE-PHASE TECHNIQUE;

DELTA SIGMA MODULATION;

EID: 33847745487     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. D. G. Haigh, B. Singh, "A Switching Scheme for Switched-Capacitor Filters, Which Reduces Effect of Parasitic Capacitances Associated with Control Terminals," Proc. ISCAS, vol. 2, pp. 586-589, 1983.
2. J. Goes et al., "Switched-Capacitor Circuits using a Single-Phase Scheme," Proc. ISCAS, pp. 3123 - 3126, May, 2005.
3. V. Cheung, H. Luong, W. Ki, "A 1-V 10.7-MHz Switched-Opamp Bandpass ΔΣ Modulator Using Double-Sampling Finite-Gain-Compensation Techniques," IEEE J. of Solid-State Circuits, vol. 37, no. 10, pp. 1215-1225, Oct., 2002.