Simulink®-based heterogeneous multiprocessor SoC design flow for mixed hardware/software refinement and simulation

Integration, the VLSI Journal

Volumn 42, Issue 2, 2009, Pages 227-245

  Han, Sang Il ^a   Chae, Soo Ik ^a   Brisolara, Lisane ^b   Carro, Luigi ^b   Popovici, Katalin ^c   Guerin, Xavier ^c   Jerraya, Ahmed A ^c   Huang, Kai ^d   Li, Lei ^d   Yan, Xiaolang ^d  

^a Seoul National University   (South Korea)

^b FEDERAL UNIVERSITY OF RIO GRANDE DO SUL   (Brazil)

^c TIMA LABORATORY   (France)

^d ZHEJIANG UNIVERSITY   (China)

Author keywords

Application to architecture mapping; Codesign; Design space exploration; Memory optimization; Multiprocessor system on chip; Simulation; Simulink; System specification

Indexed keywords

ABSTRACTING; APPLICATION SPECIFIC INTEGRATED CIRCUITS; APPLICATIONS; ARCHITECTURE; CONFORMAL MAPPING; DESIGN; DIGITAL SIGNAL PROCESSING; FLOW SIMULATION; INTEGRATED CIRCUITS; JAVA PROGRAMMING LANGUAGE; LOGIC DESIGN; MICROPROCESSOR CHIPS; MULTITASKING; OPTIMIZATION; PROGRAMMABLE LOGIC CONTROLLERS; SPACE RESEARCH; SPECIFICATIONS;

CODESIGN; DESIGN SPACE EXPLORATION; MEMORY OPTIMIZATION; MULTIPROCESSOR SYSTEM-ON-CHIP; SIMULATION; SIMULINK; SYSTEM SPECIFICATION;

MULTIPROCESSING SYSTEMS;

EID: 58149129333     PISSN: 01679260     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.vlsi.2008.08.003     Document Type: Article

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