Multi-processor system design with ESPAM

CODES+ISSS 2006: Proceedings of the 4th International Conference on Hardware Software Codesign and System Synthesis

Volumn , Issue , 2006, Pages 211-216

  Nikolov, Hristo ^a   Stefanov, Todor ^a   Deprettere, Ed ^a  

^a LEIDEN UNIVERSITY   (Netherlands)

Author keywords

Heterogeneous MPSoCs; Kahn process networks; System level design

Indexed keywords

ABSTRACTING; COMPUTATIONAL COMPLEXITY; COMPUTER ARCHITECTURE; EMBEDDED SYSTEMS; SPECIFICATIONS;

ERROR-PRONE; ESPAM; HETEROGENEOUS MPSOCS; KAHN PROCESS NETWORKS; REGISTER TRANSFER LEVEL (RTL);

MULTIPROCESSING SYSTEMS;

EID: 34247256989     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1176254.1176306     Document Type: Conference Paper

References (11)

1. Gilles Kahn, "The Semantics of a Simple Language for Parallel Programming," in Proc. of the IFIP Congress 74. 1974, North-Holland Publishing Co.
2. Todor Stefanov et al., "System Design using Kahn Process Networks: The Compaan/Laura Approach," in Proc. Int. Conference Design, Automation and Test in Europe (DATE'04), Paris, France, Feb. 16-20 2004.
3. M.J. Rutten et all., "A Heterogeneous Multiprocessor Architecture for Flexible Media Processing," IEEE Design & Test of Computers, vol. 19, no. 4, 2002.
4. Andy Pimentel et al., "A Systematic Approach to Exploring Embedded System Architectures at Multiple Abstraction Levels," IEEE Transactions on Computers, vol. 55, no. 2, 2006.
5. Erwin de Kock, "Multiprocessor Mapping of Process Networks: A JPEG Decoding Case Study," in Proc. 15th Int. Symposium on System Synthesis, Japan, 2002.
6. Kees Goossens et al., "Guaranteeing the Quality Of Services in Networks On Chip," in Networks on Chip. 2003, Kluwer Academic Publishers.
7. B. Dwivedi et al., "Automatic Synthesis of System on Chip Multiprocessor Architectures for Process networks," in Proc. Int. Conference on Hardware/Software Codesign and System Synthesis, Sweden, 2004.
8. D. Lyonnard et al., "Automatic Generation of Application-Specific Architectures for Heterogeneous Multiprocessor System-on-Chip," in Proc. 38th Design Automation Conference (DAC2001), Las Vegas, USA, June 18-22 2001.
9. A. Gerstlauer and D. Gajski, "System-level abstraction semantics," in Proc. 15th Int. Symposium on System Synthesis (ISSS'02), Kyoto, Japan, Oct. 2-4 2002, pp. 231-236.
10. Sven Verdoolaege, Hristo Nikolov, and Todor Stefanov, "Improved Derivation of Process Networks," in 4th Workshop on Optimization for DSP and Embedded Systems, ODES-4, New York, USA, Mar. 2006.
11. Todor Stefanov and Ed Deprettere, "Deriving Process Networks from Weakly Dynamic Applications in System-Level Design," in Proc. 1th Int. Conf. on Hardware/Software Codesign and System Synthesis, Newport Beach, California, USA, Oct. 1-3 2003, pp. 90-96.