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Volumn 19, Issue 6, 2002, Pages 52-63

Multiprocessor SoC platforms: A component-based design approach

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER OPERATING SYSTEMS; COMPUTER SIMULATION; INTERFACES (COMPUTER); MULTIPROCESSING SYSTEMS; NETWORK PROTOCOLS;

EID: 0036859776     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.2002.1047744     Document Type: Article
Times cited : (113)

References (12)
  • 1
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    • Component-based design approach for multicore SoCs
    • ACM Press, New York
    • W. Cesário et al., "Component-Based Design Approach for Multicore SoCs," Proc. 39th Design Automation Conf. (DAC 02), ACM Press, New York, 2002, pp. 789-794.
    • (2002) Proc. 39th Design Automation Conf. (DAC 02) , pp. 789-794
    • Cesário, W.1
  • 2
    • 85008048480 scopus 로고    scopus 로고
    • Automatic generation and targeting of application-specific operating systems and embedded systems software
    • Nov.
    • L. Gauthier, S. Yoo, and A.A. Jerraya, "Automatic Generation and Targeting of Application-Specific Operating Systems and Embedded Systems Software," IEEE Trans. Computer-Aided Design of integrated Circuits and Systems, vol. 20, no. 11, Nov. 2001, pp. 1293-1301.
    • (2001) IEEE Trans. Computer-Aided Design of integrated Circuits and Systems , vol.20 , Issue.11 , pp. 1293-1301
    • Gauthier, L.1    Yoo, S.2    Jerraya, A.A.3
  • 3
    • 0034428118 scopus 로고    scopus 로고
    • System-Level design: Orthogonalization of concerns and platform-based design
    • Dec.
    • K. Keutzer et al., "System-Level Design: Orthogonalization of Concerns and Platform-Based Design," IEEE Trans. Computer-Aided Design of Integrated CircUits and Systems, vol. 19, no. 12, Dec. 2000, pp. 1523-1543.
    • (2000) IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems , vol.19 , Issue.12 , pp. 1523-1543
    • Keutzer, K.1
  • 4
    • 0034846659 scopus 로고    scopus 로고
    • Addressing the system-on-chip interconnect woes through communication-based design
    • ACM Press, New York
    • M. Sgroi et al., "Addressing the System-on-Chip interconnect Woes through Communication-Based Design," Proc. 38th Design Automation Conf. (DAC 01), ACM Press, New York, 2001, pp. 667-672.
    • (2001) Proc. 38th Design Automation Conf. (DAC 01) , pp. 667-672
    • Sgroi, M.1
  • 6
    • 0011906556 scopus 로고    scopus 로고
    • Virtual component co-design (VCC)
    • San Jose, Calif.
    • "Virtual Component Co-design (VCC)," Cadence Design Systems, San Jose, Calif.; http://www.cadence.com/products/vcc.html.
    • Cadence Design Systems
  • 8
    • 0034841440 scopus 로고    scopus 로고
    • Micronetwork-Based integration for SOCs
    • ACM Press, New York
    • D. Wingard, "Micronetwork-Based Integration for SOCs," Proc. 38th Design Automation Conf. (DAC 01), ACM Press, New York, 2001, pp. 673-677.
    • (2001) Proc. 38th Design Automation Conf. (DAC 01) , pp. 673-677
    • Wingard, D.1
  • 9
    • 0034854046 scopus 로고    scopus 로고
    • Automatic generation of application-specific architectures for heterogeneous multiprocessor system-on-chip
    • ACM Press, New York
    • D. Lyonnard et al., "Automatic Generation of Application-Specific Architectures for Heterogeneous Multiprocessor System-on-Chip," Proc. 38th Design Automation Conf. (DAC 01 ), ACM Press, New York, pp. 518-523.
    • Proc. 38th Design Automation Conf. (DAC 01) , pp. 518-523
    • Lyonnard, D.1
  • 10
    • 0035444356 scopus 로고    scopus 로고
    • Colif: A design representation for application-specific multiprocessor SoCs
    • Sept.-Oct.
    • W.O. Cesário et al., "Colif: A Design Representation for Application-Specific Multiprocessor SOCs," IEEE Design & Test of Computers, vol. 18, no. 5, Sept.-Oct. 2001, pp. 8-20.
    • (2001) IEEE Design & Test of Computers , vol.18 , Issue.5 , pp. 8-20
    • Cesário, W.O.1
  • 11
    • 0034826750 scopus 로고    scopus 로고
    • A generic wrapper architecture for multi-processor SoC cosimulation and design
    • ACM Press, New York
    • S. Yoo et al., "A Generic Wrapper Architecture for Multi-Processor SoC Cosimulation and Design," Proc. 9th Int'l Symp. Hardware/Software Codesign (CODES 01), ACM Press, New York, 2001, pp. 195-200.
    • (2001) Proc. 9th Int'l Symp. Hardware/Software Codesign (CODES 01) , pp. 195-200
    • Yoo, S.1
  • 12
    • 0005419903 scopus 로고    scopus 로고
    • The zipper prototype: A complete and flexible VDSL multi-carrier solution
    • Sept.
    • M. Diaz-Nava and G.S. Okvist, "The Zipper Prototype: A Complete and Flexible VDSL Multi-carrier Solution," ST J. System Research, vol. 2, no. 1, Sept. 2001, pp. 1/3-21/3.
    • (2001) ST J. System Research , vol.2 , Issue.1 , pp. 13-213
    • Diaz-Nava, M.1    Okvist, G.S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.