Evaluation of voltage interpolation to address process variations

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2008, Pages 529-536

  Brownell, Kevin ^a   Wei, Gu Yeon ^a   Brooks, David ^a  

^a HARVARD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADVANCED FABRICATIONS; CIRCUIT TUNING; DELAY OVERHEADS; DESIGN APPROACHES; DESIGN BLOCKS; DESIGN CONSIDERATIONS; DESIGN PROCESSES; DESIGN TRADEOFFS; MULTIPROCESSOR MACHINES; POSTFABRICATION TUNING; POWER BUDGETS; POWER COSTS; POWER OVERHEADS; PROCESS VARIATIONS; STATIC POWERS;

COMPUTER AIDED DESIGN; DESIGN; INTERPOLATION; PAPER; TUNING;

MACHINE DESIGN;

EID: 57849167898     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2008.4681626     Document Type: Conference Paper

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