Statistical timing analysis driven post-silicon-tunable clock-tree synthesis

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn 2005, Issue , 2005, Pages 575-581

  Tsai, Jeng Liang ^a   Zhang, Lizheng ^a   Chen, Charlie Chung Ping ^a  

^a University of Wisconsin Madison   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BENCHMARKING; COMPUTATIONAL METHODS; COMPUTER HARDWARE; OPTIMIZATION; TUNING;

LEAF NODES; POST SILICON TUNABLE CLOCK TREE SYNTHESIS; STATISTICAL TIMING ANALYSIS; SUB MICRON TECHNOLOGIES;

COMPUTER AIDED DESIGN;

EID: 33751439543     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2005.1560132     Document Type: Conference Paper

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