Post silicon power/performance optimization in the presence of process variations using individual well-adaptive body biasing

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 15, Issue 3, 2007, Pages 366-376

  Gregg, Justin ^a,b   Chen, Tom W ^a,b  

^a IEEE   (United States)

^b Department of Mechanical Engineering   (United States)

Author keywords

Design centering; Design for manufacturing; Design for testability; Genetic algorithms; Integrated circuit design; Integrated circuit manufacture; VLSI

Indexed keywords

DESIGN CENTERING; DESIGN FOR MANUFACTURING; INTEGRATED CIRCUIT DESIGN;

DESIGN FOR TESTABILITY; GENETIC ALGORITHMS; INTEGRATED CIRCUIT MANUFACTURE; OPTIMIZATION; VLSI CIRCUITS;

SILICON ON INSULATOR TECHNOLOGY;

EID: 34247153506     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2007.893626     Document Type: Article

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