System level performance analysis of carbon nanotube global interconnects for emerging chip multiprocessors

2008 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2008

Volumn , Issue , 2008, Pages 1-7

  Pasricha, Sudeep ^a   Kurdahi, Fadi ^a   Dutt, Nikil ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Carbon nanotube; CMP; Interconnect; UDSM

Indexed keywords

CARBON NANOTUBES; COPPER; COPPER ALLOYS; INTERCONNECTION NETWORKS; MICROPROCESSOR CHIPS; MULTIPROCESSING SYSTEMS; NANOCOMPOSITES; NANOPORES; NANOSTRUCTURED MATERIALS; NANOSTRUCTURES; NANOTUBES; OPTICAL DESIGN; SYSTEMS ANALYSIS; TECHNOLOGY;

APPLICATIONS.; CARBON NANOTUBE; CARBON NANOTUBES (CNTS); CHIP MULTI PROCESSOR; CHIP MULTI PROCESSORS; CMP; COPPER (CU); EQUIVALENT CIRCUIT MODELING; FABRICATION TECHNOLOGIES; GLOBAL INTERCONNECTS; INTERCONNECT; INTERCONNECT FABRICS; INTERNATIONAL SYMPOSIUM; MULTI CORES; MULTI-WALLED; NANO-SCALE ARCHITECTURE; OVERALL PERFORMANCE; PROPAGATION DELAYS; SINGLE-WALLED; SYSTEM LEVEL PERFORMANCE ANALYSIS; SYSTEM LEVELS; SYSTEM-LEVEL PERFORMANCE; UDSM; ULTRA-DEEP SUB-MICRON;

NANOTECHNOLOGY;

EID: 51949087824     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NANOARCH.2008.4585785     Document Type: Conference Paper

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